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Chok J. Chia
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Santa Clara, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
3D-interconnect
Patent number
11,929,337
Issue date
Mar 12, 2024
Invensas LLC
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
3D-interconnect
Patent number
11,031,362
Issue date
Jun 8, 2021
Invensas Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
3D-interconnect
Patent number
10,181,447
Issue date
Jan 15, 2019
Invensas Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Low cost hybrid high density package
Patent number
9,875,955
Issue date
Jan 23, 2018
Tessera, Inc.
Kishor Desai
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Low cost hybrid high density package
Patent number
9,508,687
Issue date
Nov 29, 2016
Tessera, Inc.
Kishor Desai
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Low cost hybrid high density package
Patent number
8,963,310
Issue date
Feb 24, 2015
Tessera, Inc.
Kishor Desai
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Area array quad flat no-lead (QFN) package
Patent number
8,525,312
Issue date
Sep 3, 2013
Tessera, Inc.
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Flip-chip QFN structure using etched lead frame
Patent number
8,525,309
Issue date
Sep 3, 2013
Tessera, Inc.
Chok Chia
Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information
Patent Grant
Semiconductor package and method using isolated VSS plane to accomm...
Patent number
8,129,759
Issue date
Mar 6, 2012
LSI Logic Corporation
Maurice O. Othieno
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Wire bond integrated circuit package for high speed I/O
Patent number
7,804,167
Issue date
Sep 28, 2010
LSI Logic Corporation
Clifford Fishley
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Semiconductor package and method using isolated Vss plane to accomm...
Patent number
7,646,091
Issue date
Jan 12, 2010
LSI Corporation
Maurice O. Othieno
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Two layer substrate ball grid array design
Patent number
7,327,043
Issue date
Feb 5, 2008
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Insulated bonding wire tool for microelectronic packaging
Patent number
6,991,147
Issue date
Jan 31, 2006
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Dielectric stack
Patent number
6,963,138
Issue date
Nov 8, 2005
LSI Logic Corporation
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Buffer metal layer
Patent number
6,861,343
Issue date
Mar 1, 2005
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Bonding pad isolation
Patent number
6,743,979
Issue date
Jun 1, 2004
LSI Logic Corporation
Michael J. Berman
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Insulated bonding wire for microelectronic packaging
Patent number
6,670,214
Issue date
Dec 30, 2003
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Integrated circuit package
Patent number
6,603,200
Issue date
Aug 5, 2003
LSI Logic Corporation
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Molded integrated circuit package
Patent number
6,525,421
Issue date
Feb 25, 2003
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Overmold integrated circuit package
Patent number
6,519,844
Issue date
Feb 18, 2003
LSI Logic Corporation
Kumar Nagarajan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Mechanically interlocking ball grid array packages and method of ma...
Patent number
6,512,293
Issue date
Jan 28, 2003
LSI Logic Corporation
Chok J. Chia
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Method for programming a substrate for array-type packages
Patent number
6,492,253
Issue date
Dec 10, 2002
LSI Logic Corporation
Chok J. Chia
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Molded tape ball grid array package
Patent number
6,489,571
Issue date
Dec 3, 2002
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Interposer tape for semiconductor package
Patent number
6,429,534
Issue date
Aug 6, 2002
LSI Logic Corporation
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for assembling tape ball grid arrays
Patent number
6,425,179
Issue date
Jul 30, 2002
LSI Logic Corporation
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Apparatus and method for improving ball joints in semiconductor pac...
Patent number
6,306,751
Issue date
Oct 23, 2001
LSI Logic Corporation
Sunil A. Patel
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Bondable anodized aluminum heatspreader for semiconductor packages
Patent number
6,297,550
Issue date
Oct 2, 2001
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Multiple layer tape ball grid array package
Patent number
6,285,077
Issue date
Sep 4, 2001
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Grooved semiconductor die for flip-chip heat sink attachment
Patent number
6,225,695
Issue date
May 1, 2001
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Electrostatic protected substrate
Patent number
6,143,586
Issue date
Nov 7, 2000
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Patents Applications
last 30 patents
Information
Patent Application
3d-Interconnect
Publication number
20210366857
Publication date
Nov 25, 2021
Invensas Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
3D-Interconnect
Publication number
20190148324
Publication date
May 16, 2019
Invensas Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
3D-INTERCONNECT
Publication number
20180308813
Publication date
Oct 25, 2018
Invensas Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Low cost hybrid high density package
Publication number
20170077018
Publication date
Mar 16, 2017
Tessera, Inc.
Kishor Desai
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
LOW COST HYBRID HIGH DENSITY PACKAGE
Publication number
20150171058
Publication date
Jun 18, 2015
Tessera, Inc.
Kishor Desai
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
LOW COST HYBRID HIGH DENSITY PACKAGE
Publication number
20130049179
Publication date
Feb 28, 2013
Tessera, Inc.
Kishor Desai
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
AREA ARRAY QFN
Publication number
20130037925
Publication date
Feb 14, 2013
Tessera, Inc.
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
FLIP-CHIP QFN STRUCTURE USING ETCHED LEAD FRAME
Publication number
20130001757
Publication date
Jan 3, 2013
Tessera. Inc.
Chok Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
SEMICONDUCTOR PACKAGE AND METHOD USING ISOLATED VSS PLANE TO ACCOMM...
Publication number
20100067207
Publication date
Mar 18, 2010
LSI Corporation
Maurice O. Othieno
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
WIRE BOND INTEGRATED CIRCUIT PACKAGE FOR HIGH SPEED I/O
Publication number
20080128919
Publication date
Jun 5, 2008
Clifford Fishley
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Semiconductor package and method using isolated Vss plane to accomm...
Publication number
20070235849
Publication date
Oct 11, 2007
LSI Logic Corporation
Maurice O. Othieno
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Two layer substrate ball grid array design
Publication number
20070040284
Publication date
Feb 22, 2007
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Bond pad structure for gold wire bonding to copper low K dielectric...
Publication number
20060113667
Publication date
Jun 1, 2006
Chok Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Semiconductor package with wire bond arrangement to reduce cross ta...
Publication number
20060065983
Publication date
Mar 30, 2006
LSI Logic Corporation
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Laser removal of plating tails for high speed packages
Publication number
20060043565
Publication date
Mar 2, 2006
Chok J. Chia
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Insulated bonding wire tool for microelectronic packaging
Publication number
20040182911
Publication date
Sep 23, 2004
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Wire bonding to full array bonding pads on active circuitry
Publication number
20040178498
Publication date
Sep 16, 2004
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Dielectric stack
Publication number
20040150069
Publication date
Aug 5, 2004
Qwai H. Low
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Buffer metal layer
Publication number
20040072414
Publication date
Apr 15, 2004
Chok J. Chia
H01 - BASIC ELECTRIC ELEMENTS