CHRISTIAN PACHA

Person

Grasbrunn, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Systems, methods, and devices to prevent overheating from high perf...
- Patent number 9,860,773
- Issue date Jan 2, 2018
- Intel IP Corporation
- Sabine Roessel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Resistive memory and method
- Patent number 9,443,583
- Issue date Sep 13, 2016
- Infineon Technologies AG
- Christian Pacha
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit arrangement comprising a field effect transistor...
- Patent number 9,219,063
- Issue date Dec 22, 2015
- Infineon Technologies AG
- Juergen Holz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit arrangement with a plurality of on-chip monitor circuits an...
- Patent number 9,041,422
- Issue date May 26, 2015
- Intel Mobile Communications GmbH
- Thomas Baumann
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device with a test circuit and a reference circuit
- Patent number 8,847,604
- Issue date Sep 30, 2014
- Infineon Technologies AG
- Thomas Baumann
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus comprising a first transistor including a channel in a fi...
- Patent number 8,742,505
- Issue date Jun 3, 2014
- Infineon Technologies AG
- Joerg Berthold
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit arrangement and method for operating a circuit arrangement
- Patent number 8,710,913
- Issue date Apr 29, 2014
- Intel Mobile Communications GmbH
- Thomas Baumann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit arrangement comprising a field effect transistor...
- Patent number 8,629,500
- Issue date Jan 14, 2014
- Infineon Technologies AG
- Juergen Holz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with reduced charge carrier mobility
- Patent number 8,487,380
- Issue date Jul 16, 2013
- Infineon Technologies AG
- Joerg Berthold
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip self calibrating delay monitoring circuitry
- Patent number 8,451,043
- Issue date May 28, 2013
- Intel Mobile Communications GmbH
- Thomas Baumann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrally fabricated micromachine and logic elements
- Patent number 8,415,191
- Issue date Apr 9, 2013
- Infineon Technologies AG
- Stefan Kolb
- G01 - MEASURING TESTING
Information Patent Grant
Method of manufacture transistor with reduced charge carrier mobility
- Patent number 8,338,251
- Issue date Dec 25, 2012
- Infineon Technologies AG
- Joerg Berthold
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical diode using silicon formed by selective epitaxial growth
- Patent number 8,318,553
- Issue date Nov 27, 2012
- Infineon Technologies AG
- Christian Russ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device and manufacturing method thereof
- Patent number 8,310,027
- Issue date Nov 13, 2012
- Infineon Technologies AG
- Christian Russ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On-chip self calibrating delay monitoring circuitry
- Patent number 8,228,106
- Issue date Jul 24, 2012
- Intel Mobile Communications GmbH
- Thomas Baumann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pulsed static flip-flop
- Patent number 8,188,780
- Issue date May 29, 2012
- Infineon Technologies AG
- Christian Pacha
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Static randon access memory cell
- Patent number 8,183,636
- Issue date May 22, 2012
- Infineon Technologies AG
- Joerg Berthold
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit arrangement with capacitor and fabrication method
- Patent number 8,124,475
- Issue date Feb 28, 2012
- Infineon Technologies AG
- Ralf Brederlow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit arrangement with a test circuit and a reference circuit and...
- Patent number 8,081,003
- Issue date Dec 20, 2011
- Infineon Technologies AG
- Christian Pacha
- G01 - MEASURING TESTING
Information Patent Grant
Integrally fabricated micromachine and logic elements
- Patent number 8,076,738
- Issue date Dec 13, 2011
- Infineon Technologies AG
- Stefan Kolb
- G01 - MEASURING TESTING
Information Patent Grant
Resistive memory and method
- Patent number 8,063,448
- Issue date Nov 22, 2011
- Infineon Technologies AG
- Christian Pacha
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit arrangement, electronic mechanism, electrical turn out and...
- Patent number 7,958,418
- Issue date Jun 7, 2011
- Infineon Technologies AG
- Christian Pacha
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor with reduced charge carrier mobility
- Patent number 7,915,681
- Issue date Mar 29, 2011
- Infineon Technologies AG
- Jörg Berthold
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical diode using silicon formed by selective epitaxial growth
- Patent number 7,888,775
- Issue date Feb 15, 2011
- Infineon Technologies AG
- Christian Russ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit and method for detecting a voltage change
- Patent number 7,859,421
- Issue date Dec 28, 2010
- Infineon Technologies AG
- Joerg Berthold
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit arrangement with capacitor and fabrication method
- Patent number 7,820,505
- Issue date Oct 26, 2010
- Infineon Technologies, AG
- Ralf Brederlow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic component with ID tags
- Patent number 7,817,037
- Issue date Oct 19, 2010
- Infineon Technologies AG
- Ralf Brederlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse-generator circuit and circuit arrangement
- Patent number 7,764,102
- Issue date Jul 27, 2010
- Infineon Technologies AG
- Christian Pacha
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Noise-reducing transistor arrangement
- Patent number 7,733,157
- Issue date Jun 8, 2010
- Infineon Technologies AG
- Ralf Brederlow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit layout for different performance and method
- Patent number 7,709,893
- Issue date May 4, 2010
- Infineon Technologies AG
- Florian Bauer
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS, METHODS, AND DEVICES TO PREVENT OVERHEATING FROM HIGH PERF...
- Publication number 20170164220
- Publication date Jun 8, 2017
- Intel IP Corporation
- SABINE ROESSEL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Integrated Circuit Arrangement Comprising a Field Effect Transistor...
- Publication number 20140124827
- Publication date May 8, 2014
- INFINEON TECHNOLOGIES AG
- Juergen Holz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS
- Publication number 20140003136
- Publication date Jan 2, 2014
- Infineon Technologies AG
- Joerg BERTHOLD
- G11 - INFORMATION STORAGE
Information Patent Application
Transistor With Reduced Charge Carrier Mobility And Associated Methods
- Publication number 20130292769
- Publication date Nov 7, 2013
- Joerg Berthold
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT ARRANGEMENT AND METHOD FOR OPERATING A CIRCUIT ARRANGEMENT
- Publication number 20130293281
- Publication date Nov 7, 2013
- Intel Mobile Communications GmbH
- Thomas Baumann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERTICAL DIODE USING SILICON FORMED BY SELECTIVE EPITAXIAL GROWTH
- Publication number 20130009215
- Publication date Jan 10, 2013
- INFINEON TECHNOLOGIES AG
- Christian Russ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
On-Chip Self Calibrating Delay Monitoring Circuitry
- Publication number 20120268184
- Publication date Oct 25, 2012
- Intel Mobile Communications GmbH
- Thomas Baumann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
On-Chip Self Calibrating Delay Monitoring Circuitry
- Publication number 20120262213
- Publication date Oct 18, 2012
- Intel Mobile Communications GmbH
- Thomas Baumann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit Arrangement with a Plurality of On-Chip Monitor Circuits an...
- Publication number 20120249170
- Publication date Oct 4, 2012
- INFINEON TECHNOLOGIES AG
- Thomas Baumann
- G01 - MEASURING TESTING
Information Patent Application
TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS
- Publication number 20120224415
- Publication date Sep 6, 2012
- Jörg BERTHOLD
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS
- Publication number 20120223396
- Publication date Sep 6, 2012
- Jörg BERTHOLD
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device With A Test Circuit And A Reference Circuit
- Publication number 20120062257
- Publication date Mar 15, 2012
- Thomas BAUMANN
- G01 - MEASURING TESTING
Information Patent Application
INTEGRALLY FABRICATED MICROMACHINE AND LOGIC ELEMENTS
- Publication number 20120061777
- Publication date Mar 15, 2012
- Stefan Kolb
- G01 - MEASURING TESTING
Information Patent Application
RESISTIVE MEMORY AND METHOD
- Publication number 20120026781
- Publication date Feb 2, 2012
- INFINEON TECHNOLOGIES AG
- Christian Pacha
- G11 - INFORMATION STORAGE
Information Patent Application
On-Chip Self Calibrating Delay Monitoring Circuitry
- Publication number 20110187433
- Publication date Aug 4, 2011
- INFINEON TECHNOLOGIES AG
- Thomas Baumann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS
- Publication number 20110170337
- Publication date Jul 14, 2011
- Jörg Berthold
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL DIODE USING SILICON FORMED BY SELECTIVE EPITAXIAL GROWTH
- Publication number 20110095347
- Publication date Apr 28, 2011
- INFINEON TECHNOLOGIES AG
- Christian Russ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CIRCUIT ARRANGEMENT AND ASSOCIATED METHOD FOR TEMPERA...
- Publication number 20110013668
- Publication date Jan 20, 2011
- INFINEON TECHNOLOGIES AG
- Christian Pacha
- G01 - MEASURING TESTING
Information Patent Application
Circuit Arrangement With A Test Circuit And A Reference Circuit And...
- Publication number 20100194400
- Publication date Aug 5, 2010
- Thomas BAUMANN
- G01 - MEASURING TESTING
Information Patent Application
Electronic Device and Manufacturing Method Thereof
- Publication number 20090309167
- Publication date Dec 17, 2009
- Christian Russ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT AND METHOD FOR DETECTING A VOLTAGE CHANGE
- Publication number 20090189702
- Publication date Jul 30, 2009
- INFINEON TECHNOLOGIES AG
- Joerg Berthold
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT ARRANGEMENT WITH CAPACITOR AND FABRICATION METHOD
- Publication number 20090184355
- Publication date Jul 23, 2009
- Infineon Technologies AG
- Ralf Brederlow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit and Method for Operating an Integrated Circuit
- Publication number 20090115468
- Publication date May 7, 2009
- INFINEON TECHNOLOGIES AG
- Joerg Berthold
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Integrated Circuit Arrangement Comprising a Field Effect Transistor...
- Publication number 20090101975
- Publication date Apr 23, 2009
- INFINEON TECHNOLOGIES AG
- Juergen Holz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRALLY FABRICATED MICROMACHINE AND LOGIC ELEMENTS
- Publication number 20090084181
- Publication date Apr 2, 2009
- Infineon Technologies AG
- Stefan KOLB
- G01 - MEASURING TESTING
Information Patent Application
VERTICAL DIODE USING SILICON FORMED BY SELECTIVE EPITAXIAL GROWTH
- Publication number 20090085163
- Publication date Apr 2, 2009
- Christian Russ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS
- Publication number 20080308850
- Publication date Dec 18, 2008
- Jorg Berthold
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Fin Component Arrangement and Method for Manufacturing a Mult...
- Publication number 20080283925
- Publication date Nov 20, 2008
- Joerg Berthold
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Rectifier Circuit, Circuit Arrangement and Method for Manufactiring...
- Publication number 20080259665
- Publication date Oct 23, 2008
- Ralf Brederlow
- G01 - MEASURING TESTING
Information Patent Application
Circuit Arrangement, Electronic Mechanism, Electrical Turn out and...
- Publication number 20080250285
- Publication date Oct 9, 2008
- INFINEON TECHNOLOGIES AG
- Christian Pacha
- G01 - MEASURING TESTING

CHRISTIAN PACHA

Person

Patents Grantslast 30 patents

Systems, methods, and devices to prevent overheating from high perf...

Resistive memory and method

Integrated circuit arrangement comprising a field effect transistor...

Circuit arrangement with a plurality of on-chip monitor circuits an...

Semiconductor device with a test circuit and a reference circuit

Apparatus comprising a first transistor including a channel in a fi...

Circuit arrangement and method for operating a circuit arrangement

Integrated circuit arrangement comprising a field effect transistor...

Transistor with reduced charge carrier mobility

On-chip self calibrating delay monitoring circuitry

Integrally fabricated micromachine and logic elements

Method of manufacture transistor with reduced charge carrier mobility

Vertical diode using silicon formed by selective epitaxial growth

Electronic device and manufacturing method thereof

On-chip self calibrating delay monitoring circuitry

Pulsed static flip-flop

Static randon access memory cell

Integrated circuit arrangement with capacitor and fabrication method

Circuit arrangement with a test circuit and a reference circuit and...

Integrally fabricated micromachine and logic elements

Resistive memory and method

Circuit arrangement, electronic mechanism, electrical turn out and...

Transistor with reduced charge carrier mobility

Vertical diode using silicon formed by selective epitaxial growth

Circuit and method for detecting a voltage change

Integrated circuit arrangement with capacitor and fabrication method

Electronic component with ID tags

Pulse-generator circuit and circuit arrangement

Noise-reducing transistor arrangement

Circuit layout for different performance and method

Patents Applicationslast 30 patents

SYSTEMS, METHODS, AND DEVICES TO PREVENT OVERHEATING FROM HIGH PERF...

Integrated Circuit Arrangement Comprising a Field Effect Transistor...

TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS

Transistor With Reduced Charge Carrier Mobility And Associated Methods

CIRCUIT ARRANGEMENT AND METHOD FOR OPERATING A CIRCUIT ARRANGEMENT

VERTICAL DIODE USING SILICON FORMED BY SELECTIVE EPITAXIAL GROWTH

On-Chip Self Calibrating Delay Monitoring Circuitry

On-Chip Self Calibrating Delay Monitoring Circuitry

Circuit Arrangement with a Plurality of On-Chip Monitor Circuits an...

TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS

TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS

Semiconductor Device With A Test Circuit And A Reference Circuit

INTEGRALLY FABRICATED MICROMACHINE AND LOGIC ELEMENTS

RESISTIVE MEMORY AND METHOD

On-Chip Self Calibrating Delay Monitoring Circuitry

TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS

VERTICAL DIODE USING SILICON FORMED BY SELECTIVE EPITAXIAL GROWTH

SEMICONDUCTOR CIRCUIT ARRANGEMENT AND ASSOCIATED METHOD FOR TEMPERA...

Circuit Arrangement With A Test Circuit And A Reference Circuit And...

Electronic Device and Manufacturing Method Thereof

CIRCUIT AND METHOD FOR DETECTING A VOLTAGE CHANGE

INTEGRATED CIRCUIT ARRANGEMENT WITH CAPACITOR AND FABRICATION METHOD

Integrated Circuit and Method for Operating an Integrated Circuit

Integrated Circuit Arrangement Comprising a Field Effect Transistor...

INTEGRALLY FABRICATED MICROMACHINE AND LOGIC ELEMENTS

VERTICAL DIODE USING SILICON FORMED BY SELECTIVE EPITAXIAL GROWTH

TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS

Multi-Fin Component Arrangement and Method for Manufacturing a Mult...

Rectifier Circuit, Circuit Arrangement and Method for Manufactiring...

Circuit Arrangement, Electronic Mechanism, Electrical Turn out and...