Christian Wicpalek

Person

Linz, AT

People

Patents Grantslast 30 patents

Information Patent Grant
Receiver with tunable receiving chain
- Patent number 11,902,899
- Issue date Feb 13, 2024
- Apple Inc.
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for improved DPLL settling and temperature com...
- Patent number 11,190,194
- Issue date Nov 30, 2021
- Apple Inc.
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Receiver with tunable receiving chain
- Patent number 11,109,317
- Issue date Aug 31, 2021
- Apple Inc.
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock generator, phase locked loop, apparatus, method and computer...
- Patent number 10,804,908
- Issue date Oct 13, 2020
- Intel IP Corporation
- Thomas Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency based bias voltage scaling for phase locked loops
- Patent number 10,651,857
- Issue date May 12, 2020
- Apple Inc.
- Andreas Roithmeier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Performance indicator for phase locked loops
- Patent number 9,832,011
- Issue date Nov 28, 2017
- Intel IP Corporation
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase tracker for a phase locked loop
- Patent number 9,584,139
- Issue date Feb 28, 2017
- Intel IP Corporation
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Coarse tuning selection for phase locked loops
- Patent number 9,548,746
- Issue date Jan 17, 2017
- Intel IP Corporation
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital wideband closed loop phase modulator with modulation gain c...
- Patent number 9,225,562
- Issue date Dec 29, 2015
- INTEL DEUTSCHLAND GMBH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital wideband closed loop phase modulator with modulation gain c...
- Patent number 9,191,248
- Issue date Nov 17, 2015
- INTEL DEUTSCHLAND GMBH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit, method and mobile communication device
- Patent number 9,008,252
- Issue date Apr 14, 2015
- Intel Mobile Communications GmbH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Non-linear-error correction in fractional-N digital PLL frequency s...
- Patent number 8,791,733
- Issue date Jul 29, 2014
- Intel Mobile Communications GmbH
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop, transceiver device and method for generating an...
- Patent number RE44879
- Issue date May 6, 2014
- Intel Mobile Communications GmbH
- Thomas Mayer
- 331 - Oscillators
Information Patent Grant
Bitwidth reduction in loop filters used for digital PLLS
- Patent number 8,598,929
- Issue date Dec 3, 2013
- Intel Mobile Communications GmbH
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time-to-digital converter with calibration
- Patent number 8,228,219
- Issue date Jul 24, 2012
- Infineon Technologies AG
- Stephan Henzler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Estimation and compensation of oscillator nonlinearities
- Patent number 8,098,104
- Issue date Jan 17, 2012
- Infineon Technologies AG
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase locked loop, transceiver device and method for generating an...
- Patent number 7,692,498
- Issue date Apr 6, 2010
- Infineon Technologies AG
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase/frequency detector, phase locked loop, method for phase/frequ...
- Patent number 7,592,874
- Issue date Sep 22, 2009
- Infineon Technologies AG
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase-locked loop and method for operating a phase-locked-loop
- Patent number 7,394,320
- Issue date Jul 1, 2008
- Infineon Technologies AG
- Linus Maurer
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Electronic Devices Having Wireless Transceivers with Reference Cloc...
- Publication number 20240372555
- Publication date Nov 7, 2024
- Apple Inc.
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECEIVER WITH TUNABLE RECEIVING CHAIN
- Publication number 20210392585
- Publication date Dec 16, 2021
- Apple Inc.
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR IMPROVED DPLL SETTLING AND TEMPERATURE COM...
- Publication number 20210013891
- Publication date Jan 14, 2021
- Apple Inc.
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECEIVER WITH TUNABLE RECEIVING CHAIN
- Publication number 20200245248
- Publication date Jul 30, 2020
- Intel IP Corporation
- Christian Drewes
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK GENERATOR, PHASE LOCKED LOOP, APPARATUS, METHOD AND COMPUTER...
- Publication number 20190268004
- Publication date Aug 29, 2019
- Intel IP Corporation
- Thomas MAYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FREQUENCY BASED BIAS VOLTAGE SCALING FOR PHASE LOCKED LOOPS
- Publication number 20170373694
- Publication date Dec 28, 2017
- Intel IP Corporation
- Andreas Roithmeier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COARSE TUNING SELECTION FOR PHASE LOCKED LOOPS
- Publication number 20160182065
- Publication date Jun 23, 2016
- Intel IP Corporation
- Christian Wicpalek
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE TRACKER FOR A PHASE LOCKED LOOP
- Publication number 20160087639
- Publication date Mar 24, 2016
- Intel IP Corporation
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT, METHOD AND MOBILE COMMUNICATION DEVICE
- Publication number 20140105343
- Publication date Apr 17, 2014
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Non-Linear-Error Correction in Fractional-N Digital PLL Frequency S...
- Publication number 20140097875
- Publication date Apr 10, 2014
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL WIDEBAND CLOSED LOOP PHASE MODULATOR WITH MODULATION GAIN C...
- Publication number 20130223564
- Publication date Aug 29, 2013
- Intel Mobile Communications GmbH
- Thomas Mayer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TIME-TO-DIGITAL CONVERTER WITH CALIBRATION
- Publication number 20110304361
- Publication date Dec 15, 2011
- Stephan HENZLER
- G04 - HOROLOGY
Information Patent Application
Estimation and Compensation of Oscillator Nonlinearities
- Publication number 20110084769
- Publication date Apr 14, 2011
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase Locked Loop, Transceiver Device and Method for Generating an...
- Publication number 20080106341
- Publication date May 8, 2008
- Thomas Mayer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE/FREQUENCY DETECTOR, PHASE LOCKED LOOP, METHOD FOR PHASE/FREQU...
- Publication number 20080100386
- Publication date May 1, 2008
- Christian Wicpalek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase-locked loop and method for operating a phase-locked-loop
- Publication number 20070096833
- Publication date May 3, 2007
- Linus Maurer
- H03 - BASIC ELECTRONIC CIRCUITRY

Christian Wicpalek

Person

Patents Grantslast 30 patents

Receiver with tunable receiving chain

Method and apparatus for improved DPLL settling and temperature com...

Receiver with tunable receiving chain

Clock generator, phase locked loop, apparatus, method and computer...

Frequency based bias voltage scaling for phase locked loops

Performance indicator for phase locked loops

Phase tracker for a phase locked loop

Coarse tuning selection for phase locked loops

Digital wideband closed loop phase modulator with modulation gain c...

Digital wideband closed loop phase modulator with modulation gain c...

Circuit, method and mobile communication device

Non-linear-error correction in fractional-N digital PLL frequency s...

Phase locked loop, transceiver device and method for generating an...

Bitwidth reduction in loop filters used for digital PLLS

Time-to-digital converter with calibration

Estimation and compensation of oscillator nonlinearities

Phase locked loop, transceiver device and method for generating an...

Phase/frequency detector, phase locked loop, method for phase/frequ...

Phase-locked loop and method for operating a phase-locked-loop

Patents Applicationslast 30 patents

Electronic Devices Having Wireless Transceivers with Reference Cloc...

RECEIVER WITH TUNABLE RECEIVING CHAIN

METHOD AND APPARATUS FOR IMPROVED DPLL SETTLING AND TEMPERATURE COM...

RECEIVER WITH TUNABLE RECEIVING CHAIN

CLOCK GENERATOR, PHASE LOCKED LOOP, APPARATUS, METHOD AND COMPUTER...

FREQUENCY BASED BIAS VOLTAGE SCALING FOR PHASE LOCKED LOOPS

COARSE TUNING SELECTION FOR PHASE LOCKED LOOPS

PHASE TRACKER FOR A PHASE LOCKED LOOP

CIRCUIT, METHOD AND MOBILE COMMUNICATION DEVICE

Non-Linear-Error Correction in Fractional-N Digital PLL Frequency S...

DIGITAL WIDEBAND CLOSED LOOP PHASE MODULATOR WITH MODULATION GAIN C...

TIME-TO-DIGITAL CONVERTER WITH CALIBRATION

Estimation and Compensation of Oscillator Nonlinearities

Phase Locked Loop, Transceiver Device and Method for Generating an...

PHASE/FREQUENCY DETECTOR, PHASE LOCKED LOOP, METHOD FOR PHASE/FREQU...

Phase-locked loop and method for operating a phase-locked-loop