Christopher K. Morzano

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pre-sense gut node amplification in sense amplifier
- Patent number 11,967,362
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Huy T. Vo
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for storing redundancy repair information f...
- Patent number 11,015,547
- Issue date May 25, 2021
- Micron Technology, Inc.
- Christopher Morzano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for latching redundancy repair addresses at...
- Patent number 10,867,692
- Issue date Dec 15, 2020
- Micron Technology, Inc.
- Christopher Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for storing redundancy repair information f...
- Patent number 10,443,531
- Issue date Oct 15, 2019
- Micron Technology, Inc.
- Christopher Morzano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for latching redundancy repair addresses to...
- Patent number 10,381,103
- Issue date Aug 13, 2019
- Micron Technology, Inc.
- Christopher Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses having stacked devices and methods of connecting dice s...
- Patent number 9,484,326
- Issue date Nov 1, 2016
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses enabling concurrent communication between an interface...
- Patent number 9,123,552
- Issue date Sep 1, 2015
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous command-based write recovery time auto-precharge control
- Patent number 8,687,459
- Issue date Apr 1, 2014
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous command-based write recovery time auto-precharge control
- Patent number 7,944,773
- Issue date May 17, 2011
- Micron Technology, Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit for off chip driver control, and memory device u...
- Patent number 7,936,181
- Issue date May 3, 2011
- Round Rock Research, LLC
- Greg A. Blodgett
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel-to-serial data sort device
- Patent number 7,764,206
- Issue date Jul 27, 2010
- Round Rock Research, LLC
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Data strobe synchronization circuit and method for double data rate...
- Patent number 7,561,477
- Issue date Jul 14, 2009
- Micron Technology , Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for converting parallel data to serial data in...
- Patent number 7,525,458
- Issue date Apr 28, 2009
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit for off chip driver control, and memory device u...
- Patent number 7,463,052
- Issue date Dec 9, 2008
- Micron Technology, Inc.
- Greg A. Blodgett
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory array decoder
- Patent number 7,379,377
- Issue date May 27, 2008
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Data strobe synchronization circuit and method for double data rate...
- Patent number 7,362,619
- Issue date Apr 22, 2008
- Micron Technology
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for converting parallel data to serial data in...
- Patent number 7,358,872
- Issue date Apr 15, 2008
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array decoder
- Patent number 7,330,393
- Issue date Feb 12, 2008
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
DDR II write data capture calibration
- Patent number 7,318,167
- Issue date Jan 8, 2008
- Micron Technology, Inc.
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for mode register control of data bus operating m...
- Patent number 7,280,410
- Issue date Oct 9, 2007
- Micron Technology, Inc.
- Jeffrey W. Janzen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array decoder
- Patent number 7,245,550
- Issue date Jul 17, 2007
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Write address synchronization useful for a DDR prefetch SDRAM
- Patent number 7,227,812
- Issue date Jun 5, 2007
- Micron Technology, Inc.
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for mode register control of data bus operating m...
- Patent number 7,215,579
- Issue date May 8, 2007
- Micron Technology, Inc.
- Jeffrey W. Janzen
- G11 - INFORMATION STORAGE
Information Patent Grant
DDR II write data capture calibration
- Patent number 7,165,185
- Issue date Jan 16, 2007
- Micron Technology, Inc.
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed programmable counter
- Patent number 7,142,543
- Issue date Nov 28, 2006
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for adjusting clock skew
- Patent number 7,116,133
- Issue date Oct 3, 2006
- Micron Technology, Inc.
- Christopher K. Morzano
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Solution to DQS postamble ringing problem in memory chips
- Patent number 7,102,937
- Issue date Sep 5, 2006
- Micron Technology, Inc.
- Sugato Mukherjee
- G11 - INFORMATION STORAGE
Information Patent Grant
System and technique to reduce cycle time by performing column redu...
- Patent number 7,099,989
- Issue date Aug 29, 2006
- Micron Technology, Inc.
- Christopher K. Morzano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write address synchronization useful for a DDR prefetch SDRAM
- Patent number 7,054,222
- Issue date May 30, 2006
- Micron Technology, Inc.
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit for off chip driver control, and memory device u...
- Patent number 7,019,553
- Issue date Mar 28, 2006
- Micron Technology, Inc.
- Greg A. Blodgett
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
LOCAL DIGIT LINE (LDL) COUPLING CANCELLATION
- Publication number 20240194251
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Richard E. Fackenthal
- G11 - INFORMATION STORAGE
Information Patent Application
Pre-Sense Gut Node Amplification in Sense Amplifier
- Publication number 20230395130
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Huy T. Vo
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR LATCHING REDUNDANCY REPAIR ADDRESSES AT...
- Publication number 20190362805
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- Christopher Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR STORING REDUNDANCY REPAIR INFORMATION F...
- Publication number 20190264629
- Publication date Aug 29, 2019
- Micron Technology , Inc.
- Christopher Morzano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR STORING REDUNDANCY REPAIR INFORMATION F...
- Publication number 20190055895
- Publication date Feb 21, 2019
- Micron Technology, Inc.
- Christopher Morzano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR LATCHING REDUNDANCY REPAIR ADDRESSES AT...
- Publication number 20190057758
- Publication date Feb 21, 2019
- Micron Technology, Inc.
- Christopher Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS ENABLING CONCURRENT COMMUNICATION
- Publication number 20150091189
- Publication date Apr 2, 2015
- Micron Technology, Inc.
- Brent Keeth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUSES ENABLING CONCURRENT COMMUNICATION BETWEEN AN INTERFACE...
- Publication number 20110246746
- Publication date Oct 6, 2011
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronous Command-Based Write Recovery Time Auto Precharge Control
- Publication number 20110216621
- Publication date Sep 8, 2011
- Micron Technology Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Application
Parallel-to-serial data sort device
- Publication number 20100289678
- Publication date Nov 18, 2010
- ROUND ROCK RESEARCH, LLC
- Christopher K Morzano
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Synchronous Command Base Write Recovery Time Auto Precharge Control
- Publication number 20090273989
- Publication date Nov 5, 2009
- Micron Technology Inc.
- Victor Wong
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLEL-TO-SERIAL DATA SORT DEVICE
- Publication number 20090201746
- Publication date Aug 13, 2009
- Micron Technology, Inc.
- Christopher K. Morzano
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND CIRCUIT FOR OFF CHIP DRIVER CONTROL, AND MEMORY DEVICE U...
- Publication number 20090091350
- Publication date Apr 9, 2009
- Micron Technology, Inc.
- GREG A. BLODGETT
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Data strobe synchronization circuit and method for double data rate...
- Publication number 20080181031
- Publication date Jul 31, 2008
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CONVERTING PARALLEL DATA TO SERIAL DATA IN...
- Publication number 20080136690
- Publication date Jun 12, 2008
- Micron Technology, Inc.
- Christopher K. Morzano
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory array decoder
- Publication number 20070121417
- Publication date May 31, 2007
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
Memory array decoder
- Publication number 20070121416
- Publication date May 31, 2007
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
DDR II write data capture calibration
- Publication number 20070097781
- Publication date May 3, 2007
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for converting parallel data to serial data in...
- Publication number 20070046511
- Publication date Mar 1, 2007
- Christopher K. Morzano
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System and method for mode register control of data bus operating m...
- Publication number 20070036006
- Publication date Feb 15, 2007
- Jeffrey W. Janzen
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for adjusting clock skew
- Publication number 20060250163
- Publication date Nov 9, 2006
- Christopher K. Morzano
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Write address synchronization useful for a DDR prefetch SDRAM
- Publication number 20060198236
- Publication date Sep 7, 2006
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for mode register control of data bus operating m...
- Publication number 20060187740
- Publication date Aug 24, 2006
- Micron Technology, Inc.
- Jeffrey W. Janzen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory array decoder
- Publication number 20060171219
- Publication date Aug 3, 2006
- Micron Technology, Inc.
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
Method and circuit for off chip driver control, and memory device u...
- Publication number 20060125516
- Publication date Jun 15, 2006
- Greg A. Blodgett
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Write address synchronization useful for a DDR prefetch SDRAM
- Publication number 20060013060
- Publication date Jan 19, 2006
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Application
Solution to DQS postamble ringing problem in memory chips
- Publication number 20060007757
- Publication date Jan 12, 2006
- Sugato Mukherjee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY DECODER
- Publication number 20060007762
- Publication date Jan 12, 2006
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
Data strobe synchronization circuit and method for double data rate...
- Publication number 20050254336
- Publication date Nov 17, 2005
- Christopher K. Morzano
- G11 - INFORMATION STORAGE
Information Patent Application
Method and circuit for off chip driver control, and memory device u...
- Publication number 20050116736
- Publication date Jun 2, 2005
- Greg A. Blodgett
- H03 - BASIC ELECTRONIC CIRCUITRY

Christopher K. Morzano

Person

Patents Grantslast 30 patents

Pre-sense gut node amplification in sense amplifier

Apparatuses and methods for storing redundancy repair information f...

Apparatuses and methods for latching redundancy repair addresses at...

Apparatuses and methods for storing redundancy repair information f...

Apparatuses and methods for latching redundancy repair addresses to...

Apparatuses having stacked devices and methods of connecting dice s...

Apparatuses enabling concurrent communication between an interface...

Synchronous command-based write recovery time auto-precharge control

Synchronous command-based write recovery time auto-precharge control

Method and circuit for off chip driver control, and memory device u...

Parallel-to-serial data sort device

Data strobe synchronization circuit and method for double data rate...

Method and apparatus for converting parallel data to serial data in...

Method and circuit for off chip driver control, and memory device u...

Memory array decoder

Data strobe synchronization circuit and method for double data rate...

Method and apparatus for converting parallel data to serial data in...

Memory array decoder

DDR II write data capture calibration

System and method for mode register control of data bus operating m...

Memory array decoder

Write address synchronization useful for a DDR prefetch SDRAM

System and method for mode register control of data bus operating m...

DDR II write data capture calibration

High speed programmable counter

Apparatus and method for adjusting clock skew

Solution to DQS postamble ringing problem in memory chips

System and technique to reduce cycle time by performing column redu...

Write address synchronization useful for a DDR prefetch SDRAM

Method and circuit for off chip driver control, and memory device u...

Patents Applicationslast 30 patents

LOCAL DIGIT LINE (LDL) COUPLING CANCELLATION

Pre-Sense Gut Node Amplification in Sense Amplifier

APPARATUSES AND METHODS FOR LATCHING REDUNDANCY REPAIR ADDRESSES AT...

APPARATUSES AND METHODS FOR STORING REDUNDANCY REPAIR INFORMATION F...

APPARATUSES AND METHODS FOR STORING REDUNDANCY REPAIR INFORMATION F...

APPARATUSES AND METHODS FOR LATCHING REDUNDANCY REPAIR ADDRESSES AT...

APPARATUSES AND METHODS ENABLING CONCURRENT COMMUNICATION

APPARATUSES ENABLING CONCURRENT COMMUNICATION BETWEEN AN INTERFACE...

Synchronous Command-Based Write Recovery Time Auto Precharge Control

Parallel-to-serial data sort device

Synchronous Command Base Write Recovery Time Auto Precharge Control

PARALLEL-TO-SERIAL DATA SORT DEVICE

METHOD AND CIRCUIT FOR OFF CHIP DRIVER CONTROL, AND MEMORY DEVICE U...

Data strobe synchronization circuit and method for double data rate...

METHOD AND APPARATUS FOR CONVERTING PARALLEL DATA TO SERIAL DATA IN...

Memory array decoder

Memory array decoder

DDR II write data capture calibration

Method and apparatus for converting parallel data to serial data in...

System and method for mode register control of data bus operating m...

Apparatus and method for adjusting clock skew

Write address synchronization useful for a DDR prefetch SDRAM

System and method for mode register control of data bus operating m...

Memory array decoder

Method and circuit for off chip driver control, and memory device u...

Write address synchronization useful for a DDR prefetch SDRAM

Solution to DQS postamble ringing problem in memory chips

MEMORY ARRAY DECODER

Data strobe synchronization circuit and method for double data rate...

Method and circuit for off chip driver control, and memory device u...