Christopher M. Carney

Person

Red Hook, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
System for improving a logic circuit and associated methods
- Patent number 7,895,539
- Issue date Feb 22, 2011
- International Business Machines Corporation
- Christopher Carney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and computer program product for automatically w...
- Patent number 7,882,472
- Issue date Feb 1, 2011
- International Business Machines Corporation
- Nicholas P. Sardino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for resource sharing in a multiple pipeline environment
- Patent number 7,809,874
- Issue date Oct 5, 2010
- International Business Machines Corporation
- Patrick J. Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and computer program product for stale NDR detec...
- Patent number 7,752,585
- Issue date Jul 6, 2010
- International Business Machines Corporation
- Christopher M. Carney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
VLSI timing optimization with interleaved buffer insertion and wire...
- Patent number 7,480,886
- Issue date Jan 20, 2009
- International Business Machines Corporation
- Christopher M. Carney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semi-flattened pin optimization process for hierarchical physical d...
- Patent number 7,469,399
- Issue date Dec 23, 2008
- International Business Machines Corporation
- Christopher J. Berry
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
System for Improving a Logic Circuit and Associated Methods
- Publication number 20090106709
- Publication date Apr 23, 2009
- International Business Corporation
- Christopher Carney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, Apparatus, and Computer Program Product for Automatically W...
- Publication number 20090100394
- Publication date Apr 16, 2009
- International Business Machines Corporation
- Nicholas P. Sardino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, Apparatus, and Computer Program Product for Stale NDR Detec...
- Publication number 20090100395
- Publication date Apr 16, 2009
- International Business Machines Corporation
- Christopher M. Carney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semi-Flattened Pin Optimization Process for Hierarchical Physical...
- Publication number 20080066039
- Publication date Mar 13, 2008
- International Business Machines Corporation
- Christopher J. Berry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Resource Sharing in a Multiple Pipeline Environment
- Publication number 20070300040
- Publication date Dec 27, 2007
- International Business Machines Corporation
- Patrick J. Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VLSI timing optimization with interleaved buffer insertion and wire...
- Publication number 20070168900
- Publication date Jul 19, 2007
- International Business Machines Corporation
- Christopher M. Carney
- G06 - COMPUTING CALCULATING COUNTING

Christopher M. Carney

Person

Patents Grantslast 30 patents

System for improving a logic circuit and associated methods

Method, apparatus, and computer program product for automatically w...

Method for resource sharing in a multiple pipeline environment

Method, apparatus, and computer program product for stale NDR detec...

VLSI timing optimization with interleaved buffer insertion and wire...

Semi-flattened pin optimization process for hierarchical physical d...

Patents Applicationslast 30 patents

System for Improving a Logic Circuit and Associated Methods

Method, Apparatus, and Computer Program Product for Automatically W...

Method, Apparatus, and Computer Program Product for Stale NDR Detec...

Semi-Flattened Pin Optimization Process for Hierarchical Physical...

Method for Resource Sharing in a Multiple Pipeline Environment

VLSI timing optimization with interleaved buffer insertion and wire...