Clifford L. Ong

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Neural computing dies with stacked neural core regions
- Patent number 12,052,873
- Issue date Jul 30, 2024
- Intel Corporation
- Dmitri E. Nikonov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precise writing of multi-level weights to memory devices for comput...
- Patent number 12,009,026
- Issue date Jun 11, 2024
- Intel Corporation
- Clifford Ong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Uniform layouts for SRAM and register file bit cells
- Patent number 11,737,253
- Issue date Aug 22, 2023
- Intel Corporation
- Zheng Guo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-bit read-only memory device
- Patent number 11,152,060
- Issue date Oct 19, 2021
- Intel Corporation
- Xiaofei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Row based memory write assist and active sleep bias
- Patent number 10,957,386
- Issue date Mar 23, 2021
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Row based memory write assist and active sleep bias
- Patent number 10,600,476
- Issue date Mar 24, 2020
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Keeper circuit
- Patent number 8,362,806
- Issue date Jan 29, 2013
- Intel Corporation
- Sapumal B. Wijeratne
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING FIN ISOLATION REGIONS RECESSED...
- Publication number 20240113111
- Publication date Apr 4, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE-DECKED INTERCONNECT FEATURES
- Publication number 20240071913
- Publication date Feb 29, 2024
- Intel Corporation
- June Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SRAM WITH SHARED WORDLINE CONNECTION
- Publication number 20240008239
- Publication date Jan 4, 2024
- Intel Corporation
- Abhishek Anil Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS
- Publication number 20230328947
- Publication date Oct 12, 2023
- Intel Corporation
- Zheng GUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING DIFFERENTIATED CHANNEL SIZING
- Publication number 20230317808
- Publication date Oct 5, 2023
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED TRANSISTOR TERMINAL VIA JUMPERS
- Publication number 20230320057
- Publication date Oct 5, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE ELECTRICAL CONTACT FOR PMOS EPITAXIAL VOLTAGE SUPPLY
- Publication number 20230317612
- Publication date Oct 5, 2023
- Intel Corporation
- Clifford ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIAL LAYERS OF A TRANSISTOR ELECTRICALLY COUPLED WITH A BACKSI...
- Publication number 20230317148
- Publication date Oct 5, 2023
- Intel Corporation
- Clifford ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM WITH DIPOLE DOPANT THRESHOLD VOLTAGE MODULATION FOR GREATER RE...
- Publication number 20230209799
- Publication date Jun 29, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM WITH NANORIBBON WIDTH MODULATION FOR GREATER READ STABILITY
- Publication number 20230209797
- Publication date Jun 29, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM WITH CHANNEL COUNT CONTRAST FOR GREATER READ STABILITY
- Publication number 20230209798
- Publication date Jun 29, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...
- Publication number 20230178622
- Publication date Jun 8, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE DEPOPULATION OF GATE-ALL-AROUND SEMICONDUCTOR DEVICES
- Publication number 20230084182
- Publication date Mar 16, 2023
- Intel Corporation
- Mohammad Hasan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVELY THINNED GATE-ALL-AROUND (GAA) STRUCTURES
- Publication number 20230079586
- Publication date Mar 16, 2023
- Intel Corporation
- Mohammad Hasan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED RANDOM-ACCESS MEMORY DEVICES
- Publication number 20230056640
- Publication date Feb 23, 2023
- Intel Corporation
- Abhishek A. Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
BINARY-WEIGHTED CAPACITOR CHARGE-SHARING FOR MULTIPLICATION
- Publication number 20220253285
- Publication date Aug 11, 2022
- Intel Corporation
- Yu-Lin Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRECISE WRITING OF MULTI-LEVEL WEIGHTS TO MEMORY DEVICES FOR COMPUT...
- Publication number 20210098059
- Publication date Apr 1, 2021
- Intel Corporation
- Clifford Ong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-BIT READ-ONLY MEMORY DEVICE
- Publication number 20200402574
- Publication date Dec 24, 2020
- Intel Corporation
- Xiaofei Wang
- G11 - INFORMATION STORAGE
Information Patent Application
NEURAL COMPUTING DIES WITH STACKED NEURAL CORE REGIONS
- Publication number 20200373329
- Publication date Nov 26, 2020
- Intel Corporation
- Dmitri E. Nikonov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS
- Publication number 20200286549
- Publication date Sep 10, 2020
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS
- Publication number 20200058656
- Publication date Feb 20, 2020
- Intel Corporation
- Zheng GUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS
- Publication number 20190272868
- Publication date Sep 5, 2019
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Keeper circuit
- Publication number 20100327909
- Publication date Dec 30, 2010
- Sapumal B. Wijeratne
- H03 - BASIC ELECTRONIC CIRCUITRY

Clifford L. Ong

Person

Patents Grantslast 30 patents

Neural computing dies with stacked neural core regions

Precise writing of multi-level weights to memory devices for comput...

Uniform layouts for SRAM and register file bit cells

Multi-bit read-only memory device

Row based memory write assist and active sleep bias

Row based memory write assist and active sleep bias

Keeper circuit

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT STRUCTURES HAVING FIN ISOLATION REGIONS RECESSED...

DOUBLE-DECKED INTERCONNECT FEATURES

STACKED SRAM WITH SHARED WORDLINE CONNECTION

UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS

INTEGRATED CIRCUIT STRUCTURES HAVING DIFFERENTIATED CHANNEL SIZING

RECESSED TRANSISTOR TERMINAL VIA JUMPERS

BACKSIDE ELECTRICAL CONTACT FOR PMOS EPITAXIAL VOLTAGE SUPPLY

EPITAXIAL LAYERS OF A TRANSISTOR ELECTRICALLY COUPLED WITH A BACKSI...

SRAM WITH DIPOLE DOPANT THRESHOLD VOLTAGE MODULATION FOR GREATER RE...

SRAM WITH NANORIBBON WIDTH MODULATION FOR GREATER READ STABILITY

SRAM WITH CHANNEL COUNT CONTRAST FOR GREATER READ STABILITY

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...

SELECTIVE DEPOPULATION OF GATE-ALL-AROUND SEMICONDUCTOR DEVICES

SELECTIVELY THINNED GATE-ALL-AROUND (GAA) STRUCTURES

STACKED RANDOM-ACCESS MEMORY DEVICES

BINARY-WEIGHTED CAPACITOR CHARGE-SHARING FOR MULTIPLICATION

PRECISE WRITING OF MULTI-LEVEL WEIGHTS TO MEMORY DEVICES FOR COMPUT...

MULTI-BIT READ-ONLY MEMORY DEVICE

NEURAL COMPUTING DIES WITH STACKED NEURAL CORE REGIONS

ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS

UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS

ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS

Keeper circuit