Cornelis H. Van Berkel

Person

Eindhoven, NL

People

Patents Grantslast 30 patents

Information Patent Grant
Data handling system comprising memory banks and data rearrangement
- Patent number 9,490,848
- Issue date Nov 8, 2016
- NXP B.V.
- Erik Rijshouwer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scheduling of global voltage/frequency scaling switches among async...
- Patent number 9,354,930
- Issue date May 31, 2016
- Telefonaktiebolaget LM Ericsson (publ)
- Orlando Pires Dos Reis Moreira
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Vector-based matching circuit for data streams
- Patent number 9,058,108
- Issue date Jun 16, 2015
- Ericsson Modems SA
- Erik Rijshouwer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic power scaling of an intermediate symbol buffer associated w...
- Patent number 8,811,453
- Issue date Aug 19, 2014
- Ericsson Modems SA
- Ricky Nas
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit with network of message distributor circuits
- Patent number 8,605,719
- Issue date Dec 10, 2013
- ST-Ericsson SA
- Cornelis H. Van Berkel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scalar/vector processor that includes a functional unit with a vect...
- Patent number 8,510,534
- Issue date Aug 13, 2013
- ST-Ericsson SA
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of storing data, method of loading data and signal processor
- Patent number 8,489,825
- Issue date Jul 16, 2013
- ST-Ericsson SA
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory control with selective retention
- Patent number 8,305,828
- Issue date Nov 6, 2012
- ST Wireless SA
- Cornelis Hermanus Van Berkel
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for synchronising a data processing network
- Patent number 8,160,091
- Issue date Apr 17, 2012
- ST-Ericsson SA
- Ewa Hekstra-Nowacka
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory architecture
- Patent number 8,135,897
- Issue date Mar 13, 2012
- ST-Ericsson SA
- Cornelis H. Van Berkel
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Memory control with selective retention
- Patent number 7,804,732
- Issue date Sep 28, 2010
- ST-Ericsson SA
- Cornelis Hermanus Van Berkel
- G11 - INFORMATION STORAGE
Information Patent Grant
Single memory with multiple shift register functionality
- Patent number 7,774,573
- Issue date Aug 10, 2010
- ST-Ericsson SA
- Sergei Sawitzki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Display device
- Patent number 7,755,707
- Issue date Jul 13, 2010
- Koninklijke Philips Electronics N.V.
- Sander J. Roosendaal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Configurable multi-step linear feedback shift register
- Patent number 7,702,706
- Issue date Apr 20, 2010
- ST-Ericsson SA
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of connecting an UMTS mobile radio to a network
- Patent number 7,684,832
- Issue date Mar 23, 2010
- ST-Ericsson SA
- Frank Heinle
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Access to a wide memory
- Patent number 7,430,631
- Issue date Sep 30, 2008
- NXP B.V.
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address generation unit for a processor
- Patent number 7,383,419
- Issue date Jun 3, 2008
- NXP B.V.
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic circuit with a chain of processing elements
- Patent number 7,259,594
- Issue date Aug 21, 2007
- NXP B.V.
- Adrianus Marinus Gerardus Peeters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing circuit using handshake connections
- Patent number 5,903,570
- Issue date May 11, 1999
- U.S. Philips Corporation
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system comprising an asynchronously controlled pipe...
- Patent number 5,802,331
- Issue date Sep 1, 1998
- U.S. Philips Corporation
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for testing an integrated circuitry and an integrated circui...
- Patent number 5,590,275
- Issue date Dec 31, 1996
- U.S. Philips Corporation
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital data processing circuit with control of data flow by contro...
- Patent number 5,367,638
- Issue date Nov 22, 1994
- U.S. Philips Corporation
- Cornelis Niessen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write-acknowledge circuit including a write detector and a bistable...
- Patent number 5,280,596
- Issue date Jan 18, 1994
- U.S. Philips Corporation
- Cornelis H. Van Berkel
- G11 - INFORMATION STORAGE
Information Patent Grant
Silicon-compiler method and arrangement
- Patent number 5,005,136
- Issue date Apr 2, 1991
- U.S. Philips Corporation
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory comprising simultaneously addressable memory elements
- Patent number 4,845,678
- Issue date Jul 4, 1989
- U.S. Philips Corporation
- Cornelis H. van Berkel
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DEADLOCK-FREE SCHEDULING OF A TASK GRAPH ON A MULTI-CORE PROCESSOR
- Publication number 20250053443
- Publication date Feb 13, 2025
- Snap Inc.
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK DEVICE WITH CONFIGURABLE SHARED MEMORY
- Publication number 20250021259
- Publication date Jan 16, 2025
- Snap Inc.
- Cornelis Hermanus van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scheduling of Global Voltage/Frequency Scaling Switches Among Async...
- Publication number 20150293788
- Publication date Oct 15, 2015
- TELEFONAKTIEBOLAGET L M ERICSSON (publ)
- Orlando Pires Dos Reis Moreira
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector-Based Matching Circuit for Data Streams
- Publication number 20130305001
- Publication date Nov 14, 2013
- Erik Rijshouwer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC POWER SCALING OF AN INTERMEDIATE SYMBOL BUFFER ASSOCIATED W...
- Publication number 20130080711
- Publication date Mar 28, 2013
- ST-ERICSSON SA
- Ricky Nas
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA HANDLING SYSTEM COMPRISING MEMORY BANKS AND DATA REARRANGEMENT
- Publication number 20110078360
- Publication date Mar 31, 2011
- NXP B.V.
- Erik Rijshouwer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY CONTROL WITH SELECTIVE RETENTION
- Publication number 20110051501
- Publication date Mar 3, 2011
- Cornelis Hermanus Van Berkel
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT WITH NETWORK OF MESSAGE DISTRIBUTOR CIRCUITS
- Publication number 20110044328
- Publication date Feb 24, 2011
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF STORING DATA, METHOD OF LOADING DATA AND SIGNAL PROCESSOR
- Publication number 20100211749
- Publication date Aug 19, 2010
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC DEVICE AND METHOD FOR SYNCHRONIZING A COMMUNICATION
- Publication number 20100158052
- Publication date Jun 24, 2010
- Koninklijke Philips Electronics N.V.
- Daniel Timmermans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Architecture
- Publication number 20090300310
- Publication date Dec 3, 2009
- Cornelis H. Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR SYNCHRONISING A DATA PROCESSING NETWORK
- Publication number 20090172198
- Publication date Jul 2, 2009
- NXP B.V.
- Ewa Hekstra-Nowacka
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Signal Receiver for Wideband Wireless Communication
- Publication number 20080311876
- Publication date Dec 18, 2008
- NXP B.V.
- Dominicus M.W. Leenaerts
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Control With Selective Retention
- Publication number 20080259699
- Publication date Oct 23, 2008
- Koninklijke Philips Electronics N.V.
- Cornelis Hermanus Van Berkel
- G11 - INFORMATION STORAGE
Information Patent Application
Tv-Pc Architecture
- Publication number 20080263184
- Publication date Oct 23, 2008
- Koninklijke Philips Electronics, N.V.
- Gerard De Haan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Cost Acoustic Responder Location System
- Publication number 20080151692
- Publication date Jun 26, 2008
- KONINKLIJKE PHILIPS ELECTRONICS N.V.
- Esko Olavi Dijk
- G01 - MEASURING TESTING
Information Patent Application
Device and Method for Composing Codes
- Publication number 20080059551
- Publication date Mar 6, 2008
- Koninklijke Philips Electronics N.V.
- Cornelis Hermanus Van Berkel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Object sensing
- Publication number 20070139049
- Publication date Jun 21, 2007
- Koninklijke Philips Electronics N.V.
- Cornelis Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic circuit with a chain of processing elements
- Publication number 20070052448
- Publication date Mar 8, 2007
- Koninklijke Philips Electronics N.V.
- Adrianus Marinus Gerardus Peeters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable multi-step linear feedback shift register
- Publication number 20060269037
- Publication date Nov 30, 2006
- Koninklijke Philips Electronics N.V.
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Object position estimation system, apparatus and method
- Publication number 20060221769
- Publication date Oct 5, 2006
- Evert Jan Van Loenen
- G01 - MEASURING TESTING
Information Patent Application
Single memory with multiple shift register functionality
- Publication number 20060155927
- Publication date Jul 13, 2006
- Sergei Sawitzki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Loop control circuit for a data processor
- Publication number 20060107028
- Publication date May 18, 2006
- Koninklijke Philips Electronics N.V.
- Patrick Peter Elizabeth Meuwissen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address generation unit for a processor
- Publication number 20060010255
- Publication date Jan 12, 2006
- Koninklijke Philips Electronics N.V.
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalar/vector processor
- Publication number 20050240644
- Publication date Oct 27, 2005
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Access to a wide memory
- Publication number 20050240729
- Publication date Oct 27, 2005
- Cornelis Hermanus Van Berkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integraged circuit and method for testing the integrated circuit
- Publication number 20050076275
- Publication date Apr 7, 2005
- Cornelis Hermanus Van Berkel
- H03 - BASIC ELECTRONIC CIRCUITRY

Cornelis H. Van Berkel

Person

Patents Grantslast 30 patents

Data handling system comprising memory banks and data rearrangement

Scheduling of global voltage/frequency scaling switches among async...

Vector-based matching circuit for data streams

Dynamic power scaling of an intermediate symbol buffer associated w...

Circuit with network of message distributor circuits

Scalar/vector processor that includes a functional unit with a vect...

Method of storing data, method of loading data and signal processor

Memory control with selective retention

System and method for synchronising a data processing network

Memory architecture

Memory control with selective retention

Single memory with multiple shift register functionality

Display device

Configurable multi-step linear feedback shift register

Method of connecting an UMTS mobile radio to a network

Access to a wide memory

Address generation unit for a processor

Electronic circuit with a chain of processing elements

Timing circuit using handshake connections

Data processing system comprising an asynchronously controlled pipe...

Method for testing an integrated circuitry and an integrated circui...

Digital data processing circuit with control of data flow by contro...

Write-acknowledge circuit including a write detector and a bistable...

Silicon-compiler method and arrangement

Memory comprising simultaneously addressable memory elements

Patents Applicationslast 30 patents

DEADLOCK-FREE SCHEDULING OF A TASK GRAPH ON A MULTI-CORE PROCESSOR

NEURAL NETWORK DEVICE WITH CONFIGURABLE SHARED MEMORY

Scheduling of Global Voltage/Frequency Scaling Switches Among Async...

Vector-Based Matching Circuit for Data Streams

DYNAMIC POWER SCALING OF AN INTERMEDIATE SYMBOL BUFFER ASSOCIATED W...

DATA HANDLING SYSTEM COMPRISING MEMORY BANKS AND DATA REARRANGEMENT

MEMORY CONTROL WITH SELECTIVE RETENTION

CIRCUIT WITH NETWORK OF MESSAGE DISTRIBUTOR CIRCUITS

METHOD OF STORING DATA, METHOD OF LOADING DATA AND SIGNAL PROCESSOR

ELECTRONIC DEVICE AND METHOD FOR SYNCHRONIZING A COMMUNICATION

Memory Architecture

SYSTEM AND METHOD FOR SYNCHRONISING A DATA PROCESSING NETWORK

Signal Receiver for Wideband Wireless Communication

Memory Control With Selective Retention

Tv-Pc Architecture

Low Cost Acoustic Responder Location System

Device and Method for Composing Codes

Object sensing

Electronic circuit with a chain of processing elements

Configurable multi-step linear feedback shift register

Object position estimation system, apparatus and method

Single memory with multiple shift register functionality

Loop control circuit for a data processor

Address generation unit for a processor

Scalar/vector processor

Access to a wide memory

Integraged circuit and method for testing the integrated circuit