D. Tony Stelliga

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Network architecture
- Patent number 6,026,088
- Issue date Feb 15, 2000
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed network interface having SAR plus physical interface
- Patent number 6,016,401
- Issue date Jan 18, 2000
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection and correction apparatus for an asynchronous transf...
- Patent number 5,963,543
- Issue date Oct 5, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switched network hub on a chip
- Patent number 5,914,955
- Issue date Jun 22, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single chip network adapter apparatus
- Patent number 5,887,187
- Issue date Mar 23, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed single chip digital video network apparatus
- Patent number 5,872,784
- Issue date Feb 16, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port network adapter
- Patent number 5,864,554
- Issue date Jan 26, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed single chip digital video network apparatus
- Patent number 5,856,975
- Issue date Jan 5, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random number generating apparatus for an interface unit of a carri...
- Patent number 5,838,904
- Issue date Nov 17, 1998
- LSI Logic Corp.
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single chip universal protocol multi-function ATM network interface
- Patent number 5,802,287
- Issue date Sep 1, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Single chip network hub with dynamic window filter
- Patent number 5,668,809
- Issue date Sep 16, 1997
- LSI Logic Corporation
- Michael D. Rostoker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error detection and correction method for an asynchronous transfer...
- Patent number 5,654,962
- Issue date Aug 5, 1997
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single chip network router
- Patent number 5,640,399
- Issue date Jun 17, 1997
- LSI Logic Corporation
- Michael D. Rostoker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Random number generating apparatus for an interface unit of a carri...
- Patent number 5,625,825
- Issue date Apr 29, 1997
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection and correction apparatus for an asynchronous transf...
- Patent number 5,446,726
- Issue date Aug 29, 1995
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING

D. Tony Stelliga

Person

Patents Grantslast 30 patents

Network architecture

High speed network interface having SAR plus physical interface

Error detection and correction apparatus for an asynchronous transf...

Switched network hub on a chip

Single chip network adapter apparatus

High speed single chip digital video network apparatus

Multi-port network adapter

High speed single chip digital video network apparatus

Random number generating apparatus for an interface unit of a carri...

Single chip universal protocol multi-function ATM network interface

Single chip network hub with dynamic window filter

Error detection and correction method for an asynchronous transfer...

Single chip network router

Random number generating apparatus for an interface unit of a carri...

Error detection and correction apparatus for an asynchronous transf...