Dale Kersten

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming a laminate structure having a plated through-hole...
- Patent number 12,150,254
- Issue date Nov 19, 2024
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Simultaneous and selective wide gap partitioning of via structures...
- Patent number 11,765,827
- Issue date Sep 19, 2023
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of forming high aspect ratio plated through holes and high...
- Patent number 11,399,439
- Issue date Jul 26, 2022
- Sanmina Corporation
- Douglas Ward Thomas
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Laminate structures with hole plugs and methods of forming laminate...
- Patent number 11,246,226
- Issue date Feb 8, 2022
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of forming a laminate structure having a plated through-hole...
- Patent number 10,757,819
- Issue date Aug 25, 2020
- Sanmina Corporation
- Shinichi Iketani
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Simultaneous and selective wide gap partitioning of via structures...
- Patent number 10,667,390
- Issue date May 26, 2020
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Simultaneous and selective wide gap partitioning of via structures...
- Patent number 10,362,687
- Issue date Jul 23, 2019
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for forming hole plug
- Patent number 10,237,983
- Issue date Mar 19, 2019
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of forming high aspect ratio plated through holes and high...
- Patent number 10,188,001
- Issue date Jan 22, 2019
- Sanmina Corporation
- Douglas Ward Thomas
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Simultaneous and selective wide gap partitioning of via structures...
- Patent number 10,123,432
- Issue date Nov 6, 2018
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Simultaneous and selective wide gap partitioning of via structures...
- Patent number 9,781,830
- Issue date Oct 3, 2017
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Simultaneous and selective wide gap partitioning of via structures...
- Patent number 9,781,844
- Issue date Oct 3, 2017
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF FORMING HIGH ASPECT RATIO PLATED THROUGH HOLES AND HIGH...
- Publication number 20220338355
- Publication date Oct 20, 2022
- Sanmina Corporation
- Douglas Ward THOMAS
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD OF FORMING A LAMINATE STRUCTURE HAVING A PLATED THROUGH-HOLE...
- Publication number 20210014980
- Publication date Jan 14, 2021
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...
- Publication number 20200383204
- Publication date Dec 3, 2020
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
LAMINATE STRUCTURES WITH HOLE PLUGS AND METHODS OF FORMING LAMINATE...
- Publication number 20190208645
- Publication date Jul 4, 2019
- Sanmina Corporation
- Shinichi IKETANI
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHODS OF FORMING HIGH ASPECT RATIO PLATED THROUGH HOLES AND HIGH...
- Publication number 20190159346
- Publication date May 23, 2019
- Sanmina Corporation
- Douglas Ward THOMAS
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...
- Publication number 20190075662
- Publication date Mar 7, 2019
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHODS OF FORMING SEGMENTED VIAS FOR PRINTED CIRCUIT BOARDS
- Publication number 20180317327
- Publication date Nov 1, 2018
- Sanmina Corporation
- Shinichi IKETANI
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...
- Publication number 20180098426
- Publication date Apr 5, 2018
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...
- Publication number 20180092222
- Publication date Mar 29, 2018
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Hole plug for thin laminate
- Publication number 20160219703
- Publication date Jul 28, 2016
- Sanmina Corporation
- Shinichi IKETANI
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHODS OF FORMING HIGH ASPECT RATIO PLATED THROUGH HOLES AND HIGH...
- Publication number 20150208514
- Publication date Jul 23, 2015
- Sanmina Corporation
- Douglas Ward THOMAS
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHODS OF FORMING SEGMENTED VIAS FOR PRINTED CIRCUIT BOARDS
- Publication number 20150181724
- Publication date Jun 25, 2015
- Sanmina Corporation
- Shinichi IKETANI
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
METHOD OF FORMING A LAMINATE STRUCTURE HAVING A PLATED THROUGH-HOLE...
- Publication number 20150007933
- Publication date Jan 8, 2015
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...
- Publication number 20140262455
- Publication date Sep 18, 2014
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...
- Publication number 20140251663
- Publication date Sep 11, 2014
- Sanmina Corporation
- Shinichi Iketani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Dale Kersten

Person

Patents Grantslast 30 patents

Method of forming a laminate structure having a plated through-hole...

Simultaneous and selective wide gap partitioning of via structures...

Methods of forming high aspect ratio plated through holes and high...

Laminate structures with hole plugs and methods of forming laminate...

Method of forming a laminate structure having a plated through-hole...

Simultaneous and selective wide gap partitioning of via structures...

Simultaneous and selective wide gap partitioning of via structures...

Method for forming hole plug

Methods of forming high aspect ratio plated through holes and high...

Simultaneous and selective wide gap partitioning of via structures...

Simultaneous and selective wide gap partitioning of via structures...

Simultaneous and selective wide gap partitioning of via structures...

Patents Applicationslast 30 patents

METHODS OF FORMING HIGH ASPECT RATIO PLATED THROUGH HOLES AND HIGH...

METHOD OF FORMING A LAMINATE STRUCTURE HAVING A PLATED THROUGH-HOLE...

SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...

LAMINATE STRUCTURES WITH HOLE PLUGS AND METHODS OF FORMING LAMINATE...

METHODS OF FORMING HIGH ASPECT RATIO PLATED THROUGH HOLES AND HIGH...

SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...

METHODS OF FORMING SEGMENTED VIAS FOR PRINTED CIRCUIT BOARDS

SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...

SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...

Hole plug for thin laminate

METHODS OF FORMING HIGH ASPECT RATIO PLATED THROUGH HOLES AND HIGH...

METHODS OF FORMING SEGMENTED VIAS FOR PRINTED CIRCUIT BOARDS

METHOD OF FORMING A LAMINATE STRUCTURE HAVING A PLATED THROUGH-HOLE...

SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...

SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES...