Dana Marie Woeste

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Ratioed feedback body voltage bias generator
- Patent number 8,310,298
- Issue date Nov 13, 2012
- International Business Machines Corporation
- Steven J. Baumgartner
- G05 - CONTROLLING REGULATING
Information Patent Grant
Architecture for a physical interface of a high speed front side bus
- Patent number 7,945,805
- Issue date May 17, 2011
- International Business Machines Corporation
- Steven John Baumgartner
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Unlock mode in source synchronous receivers
- Patent number 7,940,878
- Issue date May 10, 2011
- International Business Machines Corporation
- Steven J. Baumgartner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ratioed feedback body voltage bias generator
- Patent number 7,652,523
- Issue date Jan 26, 2010
- International Business Machines Corporation
- Steven J. Baumgartner
- G05 - CONTROLLING REGULATING
Information Patent Grant
Architecture for a physical interface of a high speed front side bus
- Patent number 7,624,297
- Issue date Nov 24, 2009
- International Business Machines Corporation
- Steven John Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ratioed feedback body voltage bias generator
- Patent number 7,474,144
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Steven J. Baumgartner
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and low voltage CMOS circuit for generating voltage and curr...
- Patent number 6,859,092
- Issue date Feb 22, 2005
- International Business Machines Corporation
- Eric John Lukes
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and system for sending large numbers of CMOS control signals...
- Patent number 6,342,793
- Issue date Jan 29, 2002
- International Business Machines Corporation
- Eric John Lukes
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple-mode clock distribution apparatus and method with adaptive...
- Patent number 6,232,806
- Issue date May 15, 2001
- International Business Machines Corporation
- Dana Marie Woeste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed differential output driver with increased voltage swing...
- Patent number 6,218,901
- Issue date Apr 17, 2001
- International Business Machines Corporation
- Eric John Lukes
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digitally controlled differential delay line circuit and method of...
- Patent number 6,060,939
- Issue date May 9, 2000
- International Business Machines Corporation
- Dana Marie Woeste
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Automatically ranging phase locked loop circuit for microprocessor...
- Patent number 5,903,195
- Issue date May 11, 1999
- International Business Machines Corporation
- Eric John Lukes
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Method and Apparatus for Improvement of Matching FET Currents Using...
- Publication number 20090189671
- Publication date Jul 30, 2009
- Steven John Baumgartner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Design Structure for Improvement of Matching FET Currents Using a D...
- Publication number 20090193372
- Publication date Jul 30, 2009
- Steven John Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unlock Mode in Source Synchronous Receivers
- Publication number 20080205570
- Publication date Aug 28, 2008
- Steven J. Baumgartner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Ratioed Feedback Body Voltage Bias Generator
- Publication number 20080191793
- Publication date Aug 14, 2008
- International Business Machines Corporation
- Steven J. Baumgartner
- G05 - CONTROLLING REGULATING
Information Patent Application
Architecture for a Physical Interface of a High Speed Front Side Bus
- Publication number 20080147952
- Publication date Jun 19, 2008
- Steven John Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture for a Physical Interface of a High Speed Front Side Bus
- Publication number 20080148088
- Publication date Jun 19, 2008
- International Business Machines Corporation
- Steven John Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ratioed Feedback Body Voltage Bias Generator
- Publication number 20080072181
- Publication date Mar 20, 2008
- International Business Machines Corporation
- Steven J. Baumgartner
- G05 - CONTROLLING REGULATING
Information Patent Application
Ratioed Feedback Body Voltage Bias Generator
- Publication number 20080068072
- Publication date Mar 20, 2008
- Steven J. Baumgartner
- G05 - CONTROLLING REGULATING
Information Patent Application
Method and low voltage CMOS circuit for generating voltage and curr...
- Publication number 20040207460
- Publication date Oct 21, 2004
- International Business Machines Corporation
- Eric John Lukes
- G05 - CONTROLLING REGULATING

Dana Marie Woeste

Person

Patents Grantslast 30 patents

Ratioed feedback body voltage bias generator

Architecture for a physical interface of a high speed front side bus

Unlock mode in source synchronous receivers

Ratioed feedback body voltage bias generator

Architecture for a physical interface of a high speed front side bus

Ratioed feedback body voltage bias generator

Method and low voltage CMOS circuit for generating voltage and curr...

Method and system for sending large numbers of CMOS control signals...

Multiple-mode clock distribution apparatus and method with adaptive...

High speed differential output driver with increased voltage swing...

Digitally controlled differential delay line circuit and method of...

Automatically ranging phase locked loop circuit for microprocessor...

Patents Applicationslast 30 patents

Method and Apparatus for Improvement of Matching FET Currents Using...

Design Structure for Improvement of Matching FET Currents Using a D...

Unlock Mode in Source Synchronous Receivers

Ratioed Feedback Body Voltage Bias Generator

Architecture for a Physical Interface of a High Speed Front Side Bus

Architecture for a Physical Interface of a High Speed Front Side Bus

Ratioed Feedback Body Voltage Bias Generator

Ratioed Feedback Body Voltage Bias Generator

Method and low voltage CMOS circuit for generating voltage and curr...