Daniel Delprat

Person

Crolles, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Heterostructure and method of fabrication
- Patent number 12,101,080
- Issue date Sep 24, 2024
- SOITEC
- Arnaud Castex
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Heterostructure and method of fabrication
- Patent number 11,637,542
- Issue date Apr 25, 2023
- Soitec
- Arnaud Castex
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterostructure and method of fabrication
- Patent number 11,595,020
- Issue date Feb 28, 2023
- Soitec
- Arnaud Castex
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor on insulator type structur...
- Patent number 11,373,898
- Issue date Jun 28, 2022
- Soitec
- Daniel Delprat
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method for manufacturing a structure for forming a tridimensional m...
- Patent number 11,205,702
- Issue date Dec 21, 2021
- Soitec
- Christophe Figuet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterostructure and method of fabrication
- Patent number 10,826,459
- Issue date Nov 3, 2020
- Soitec
- Arnaud Castex
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for transferring a layer of a semiconductor and substrate co...
- Patent number 9,716,029
- Issue date Jul 25, 2017
- Soitec
- Fabrice Lallement
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor on insulator structure hav...
- Patent number 9,293,473
- Issue date Mar 22, 2016
- Soitec
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor-on-insulator structure hav...
- Patent number 8,962,450
- Issue date Feb 24, 2015
- Soitec
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing irregularities at the surface of a layer transf...
- Patent number 8,946,053
- Issue date Feb 3, 2015
- Soitec
- Daniel Delprat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for molecular bonding of silicon and glass substrates
- Patent number 8,790,993
- Issue date Jul 29, 2014
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor on glass substrate with stiffening layer
- Patent number 8,772,875
- Issue date Jul 8, 2014
- Corning Incorporated
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor-on-insulator structure hav...
- Patent number 8,658,514
- Issue date Feb 25, 2014
- Soitec
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for molecular bonding of silicon and glass substrates
- Patent number 8,580,654
- Issue date Nov 12, 2013
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of making semiconductor on glass substrates with a stiffeni...
- Patent number 8,518,799
- Issue date Aug 27, 2013
- Corning Incorporated
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor on glass substrate with stiffening layer and process...
- Patent number 8,357,974
- Issue date Jan 22, 2013
- Corning Incorporated
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of bonding two substrates
- Patent number 8,349,703
- Issue date Jan 8, 2013
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for preparing a bonding surface of a semiconductor wafer
- Patent number 7,919,391
- Issue date Apr 5, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Cécile Delattre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding interface quality by cold cleaning and hot bonding
- Patent number 7,645,682
- Issue date Jan 12, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of configuring a process to obtain a thin layer with a low d...
- Patent number 7,485,545
- Issue date Feb 3, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for manufacturing compound-material wafers and for recyclin...
- Patent number 7,405,136
- Issue date Jul 29, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Daniel Delprat
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HETEROSTRUCTURE AND METHOD OF FABRICATION
- Publication number 20230275559
- Publication date Aug 31, 2023
- SOITEC
- Arnaud Castex
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HETEROSTRUCTURE AND METHOD OF FABRICATION
- Publication number 20210058058
- Publication date Feb 25, 2021
- SOITEC
- Arnaud Castex
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR ON INSULATOR TYPE STRUCTUR...
- Publication number 20210050250
- Publication date Feb 18, 2021
- Daniel Delprat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A STRUCTURE FOR FORMING A TRIDIMENSIONAL M...
- Publication number 20200295138
- Publication date Sep 17, 2020
- Christophe Figuet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROSTRUCTURE AND METHOD OF FABRICATION
- Publication number 20200280298
- Publication date Sep 3, 2020
- SOITEC
- Arnaud Castex
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROSTRUCTURE AND METHOD OF FABRICATION
- Publication number 20180159498
- Publication date Jun 7, 2018
- SOITEC
- Arnaud Castex
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR ON INSULATOR STRUCTURE HAV...
- Publication number 20150171110
- Publication date Jun 18, 2015
- SOITEC
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR MOLECULAR BONDING OF SUBSTRATES
- Publication number 20150056783
- Publication date Feb 26, 2015
- SOITEC
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TRANSFERRING A LAYER OF A SEMICONDUCTOR AND SUBSTRATE CO...
- Publication number 20140183601
- Publication date Jul 3, 2014
- SOITEC
- Fabrice Lallement
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...
- Publication number 20140038388
- Publication date Feb 6, 2014
- SOITEC
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
QUANTUM WELL THERMOELECTRIC COMPONENT FOR USE IN A THERMOELECTRIC D...
- Publication number 20140027714
- Publication date Jan 30, 2014
- SOITEC
- Daniel Delprat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ON GLASS SUBSTRATE WITH STIFFENING LAYER AND PROCESS...
- Publication number 20130341756
- Publication date Dec 26, 2013
- SOITEC
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES
- Publication number 20130309841
- Publication date Nov 21, 2013
- SOITEC
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ON GLASS SUBSTRATE WITH STIFFENING LAYER AND PROCESS...
- Publication number 20130130473
- Publication date May 23, 2013
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR REDUCING IRREGULARITIES AT THE SURFACE OF A LAYER TRANSF...
- Publication number 20130071997
- Publication date Mar 21, 2013
- SOITEC
- Daniel Delprat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...
- Publication number 20120319121
- Publication date Dec 20, 2012
- SOITEC
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES
- Publication number 20120088350
- Publication date Apr 12, 2012
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ON GLASS SUBSTRATE WITH STIFFENING LAYER AND PROCESS...
- Publication number 20120001293
- Publication date Jan 5, 2012
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF BONDING TWO SUBSTRATES
- Publication number 20100093152
- Publication date Apr 15, 2010
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING INTERFACE QUALITY BY COLD CLEANING AND HOT BONDING
- Publication number 20080200008
- Publication date Aug 21, 2008
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for manufacturing compound-material wafers and for recyclin...
- Publication number 20070216042
- Publication date Sep 20, 2007
- Daniel Delprat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of configuring a process to obtain a thin layer with a low d...
- Publication number 20060141755
- Publication date Jun 29, 2006
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for forming semiconductor structures
- Publication number 20060141746
- Publication date Jun 29, 2006
- Cecile Delattre
- H01 - BASIC ELECTRIC ELEMENTS

Daniel Delprat

Person

Patents Grantslast 30 patents

Heterostructure and method of fabrication

Heterostructure and method of fabrication

Heterostructure and method of fabrication

Method for manufacturing a semiconductor on insulator type structur...

Method for manufacturing a structure for forming a tridimensional m...

Heterostructure and method of fabrication

Method for transferring a layer of a semiconductor and substrate co...

Method for manufacturing a semiconductor on insulator structure hav...

Method for manufacturing a semiconductor-on-insulator structure hav...

Method for reducing irregularities at the surface of a layer transf...

Method for molecular bonding of silicon and glass substrates

Semiconductor on glass substrate with stiffening layer

Method for manufacturing a semiconductor-on-insulator structure hav...

Method for molecular bonding of silicon and glass substrates

Process of making semiconductor on glass substrates with a stiffeni...

Semiconductor on glass substrate with stiffening layer and process...

Method of bonding two substrates

Methods for preparing a bonding surface of a semiconductor wafer

Bonding interface quality by cold cleaning and hot bonding

Method of configuring a process to obtain a thin layer with a low d...

Methods for manufacturing compound-material wafers and for recyclin...

Patents Applicationslast 30 patents

HETEROSTRUCTURE AND METHOD OF FABRICATION

HETEROSTRUCTURE AND METHOD OF FABRICATION

METHOD FOR MANUFACTURING A SEMICONDUCTOR ON INSULATOR TYPE STRUCTUR...

METHOD FOR MANUFACTURING A STRUCTURE FOR FORMING A TRIDIMENSIONAL M...

HETEROSTRUCTURE AND METHOD OF FABRICATION

HETEROSTRUCTURE AND METHOD OF FABRICATION

METHOD FOR MANUFACTURING A SEMICONDUCTOR ON INSULATOR STRUCTURE HAV...

SYSTEMS AND METHODS FOR MOLECULAR BONDING OF SUBSTRATES

METHOD FOR TRANSFERRING A LAYER OF A SEMICONDUCTOR AND SUBSTRATE CO...

METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...

QUANTUM WELL THERMOELECTRIC COMPONENT FOR USE IN A THERMOELECTRIC D...

SEMICONDUCTOR ON GLASS SUBSTRATE WITH STIFFENING LAYER AND PROCESS...

METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES

SEMICONDUCTOR ON GLASS SUBSTRATE WITH STIFFENING LAYER AND PROCESS...

METHOD FOR REDUCING IRREGULARITIES AT THE SURFACE OF A LAYER TRANSF...

METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...

METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES

SEMICONDUCTOR ON GLASS SUBSTRATE WITH STIFFENING LAYER AND PROCESS...

METHOD OF BONDING TWO SUBSTRATES

BONDING INTERFACE QUALITY BY COLD CLEANING AND HOT BONDING

Methods for manufacturing compound-material wafers and for recyclin...

Method of configuring a process to obtain a thin layer with a low d...

Methods for forming semiconductor structures