Daniel R. Loughmiller

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Temperature differential-based voltage offset control
- Patent number 12,027,228
- Issue date Jul 2, 2024
- Micron Technology, Inc.
- Ryan G. Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clamp circuit with fuse options
- Patent number 7,468,623
- Issue date Dec 23, 2008
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for configuring CAM array margin test and operation
- Patent number 7,254,753
- Issue date Aug 7, 2007
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Grant
Communication device for a logic circuit
- Patent number 7,196,544
- Issue date Mar 27, 2007
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Communication device for a logic circuit
- Patent number 7,053,650
- Issue date May 30, 2006
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit and method for measuring and forcing an internal voltage of...
- Patent number 6,946,863
- Issue date Sep 20, 2005
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Grant
Controller for delay locked loop circuits
- Patent number 6,901,013
- Issue date May 31, 2005
- Micron Technology, Inc.
- William Jones
- G11 - INFORMATION STORAGE
Information Patent Grant
Clamp circuit with fuse options
- Patent number 6,885,238
- Issue date Apr 26, 2005
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
High density dynamic ternary-CAM memory architecture
- Patent number 6,847,534
- Issue date Jan 25, 2005
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of reducing standby current during power down mode
- Patent number 6,836,437
- Issue date Dec 28, 2004
- Micron Technology, Inc.
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Split word line ternary CAM architecture
- Patent number 6,836,419
- Issue date Dec 28, 2004
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for contact pad isolation
- Patent number 6,822,475
- Issue date Nov 23, 2004
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Controller for delay locked loop circuits
- Patent number 6,809,974
- Issue date Oct 26, 2004
- Micron Technology, Inc.
- William Jones
- G11 - INFORMATION STORAGE
Information Patent Grant
High density dynamic ternary-CAM memory architecture
- Patent number 6,744,654
- Issue date Jun 1, 2004
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Grant
Power reduction for delay locked loop circuits
- Patent number 6,737,897
- Issue date May 18, 2004
- Micron Technology, Inc.
- Tyler J. Gomm
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of reducing standby current during power down mode
- Patent number 6,665,219
- Issue date Dec 16, 2003
- Micron Technology, Inc.
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for contact pad isolation
- Patent number 6,628,144
- Issue date Sep 30, 2003
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for noise and power reduction for digital delay lines
- Patent number 6,586,979
- Issue date Jul 1, 2003
- Micron Technology, Inc.
- Tyler J. Gomm
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for testing an integrated circuit
- Patent number 6,564,351
- Issue date May 13, 2003
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay line tap setting override for delay locked loop (DLL) testabi...
- Patent number 6,448,756
- Issue date Sep 10, 2002
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of reducing standby current during power down mode
- Patent number 6,438,060
- Issue date Aug 20, 2002
- Micron Technology, Inc.
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for contact pad isolation
- Patent number 6,396,300
- Issue date May 28, 2002
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Output driver
- Patent number 6,377,089
- Issue date Apr 23, 2002
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clamp circuit with fuse options
- Patent number 6,351,180
- Issue date Feb 26, 2002
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for testing an integrated circuit
- Patent number 6,266,794
- Issue date Jul 24, 2001
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for measuring and forcing an internal voltage of...
- Patent number 6,229,296
- Issue date May 8, 2001
- Micron Technology, Inc.
- Kevin G. Duesman
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and methods selectively deriving a boosted voltage exceed...
- Patent number 6,140,831
- Issue date Oct 31, 2000
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G01 - MEASURING TESTING
Information Patent Grant
Circuit and method for measuring and forcing an internal voltage of...
- Patent number 6,117,696
- Issue date Sep 12, 2000
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G01 - MEASURING TESTING
Information Patent Grant
Circuit for contact pad isolation
- Patent number 6,114,878
- Issue date Sep 5, 2000
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Drive-current modulated output driver
- Patent number 6,097,223
- Issue date Aug 1, 2000
- Micron Technology, Inc.
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
TEMPERATURE DIFFERENTIAL-BASED VOLTAGE OFFSET CONTROL
- Publication number 20240355367
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Ryan G. Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE DIFFERENTIAL-BASED VOLTAGE OFFSET CONTROL
- Publication number 20230197119
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Ryan G. Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for contact pad isolation
- Publication number 20070109016
- Publication date May 17, 2007
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Communication device for a logic circuit
- Publication number 20060176076
- Publication date Aug 10, 2006
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Communication device for a logic circuit
- Publication number 20050024093
- Publication date Feb 3, 2005
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit and method for configuring CAM array margin test and operation
- Publication number 20050022079
- Publication date Jan 27, 2005
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Application
High density dynamic ternary-CAM memory architecture
- Publication number 20040196701
- Publication date Oct 7, 2004
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Application
Method for contact pad isolation
- Publication number 20040046591
- Publication date Mar 11, 2004
- Daniel R. Loughmiller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method of reducing standby current during power down mode
- Publication number 20040042282
- Publication date Mar 4, 2004
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Application
Split word line ternary CAM architecture
- Publication number 20040037103
- Publication date Feb 26, 2004
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Application
High density dynamic ternary-CAM memory architecture
- Publication number 20040037104
- Publication date Feb 26, 2004
- Daniel R. Loughmiller
- G11 - INFORMATION STORAGE
Information Patent Application
Clamp circuit with fuse options
- Publication number 20040027190
- Publication date Feb 12, 2004
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Application
Controller for delay locked loop circuits
- Publication number 20020191462
- Publication date Dec 19, 2002
- Micron Technology, Inc.
- William Jones
- G11 - INFORMATION STORAGE
Information Patent Application
Power reduction for delay locked loop circuits
- Publication number 20020190767
- Publication date Dec 19, 2002
- Micron Technology, Inc.
- Tyler J. Gomm
- G11 - INFORMATION STORAGE
Information Patent Application
Method of characterizing a delay locked loop
- Publication number 20020181296
- Publication date Dec 5, 2002
- William Jones
- G11 - INFORMATION STORAGE
Information Patent Application
Method of reducing standby current during power down mode
- Publication number 20020181299
- Publication date Dec 5, 2002
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Application
Method for noise and power reduction for digital delay lines
- Publication number 20020135409
- Publication date Sep 26, 2002
- Micron Technology, Inc.
- Tyler J. Gomm
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for contact pad isolation
- Publication number 20020109529
- Publication date Aug 15, 2002
- Daniel R. Loughmiller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF REDUCING STANDBY CURRENT DURING POWER DOWN MODE
- Publication number 20020110035
- Publication date Aug 15, 2002
- Wen Li
- G11 - INFORMATION STORAGE
Information Patent Application
Clamp circuit with fuse options
- Publication number 20020030539
- Publication date Mar 14, 2002
- Micron Technology, Inc.,
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for testing an integrated circuit
- Publication number 20010042233
- Publication date Nov 15, 2001
- Micron Technology, Inc.
- Daniel R. Loughmiller
- G01 - MEASURING TESTING

Daniel R. Loughmiller

Person

Patents Grantslast 30 patents

Temperature differential-based voltage offset control

Clamp circuit with fuse options

Circuit and method for configuring CAM array margin test and operation

Communication device for a logic circuit

Communication device for a logic circuit

Circuit and method for measuring and forcing an internal voltage of...

Controller for delay locked loop circuits

Clamp circuit with fuse options

High density dynamic ternary-CAM memory architecture

Method of reducing standby current during power down mode

Split word line ternary CAM architecture

Method for contact pad isolation

Controller for delay locked loop circuits

High density dynamic ternary-CAM memory architecture

Power reduction for delay locked loop circuits

Method of reducing standby current during power down mode

Circuit and method for contact pad isolation

Method for noise and power reduction for digital delay lines

Circuit and method for testing an integrated circuit

Delay line tap setting override for delay locked loop (DLL) testabi...

Method of reducing standby current during power down mode

Circuit and method for contact pad isolation

Output driver

Clamp circuit with fuse options

Circuit and method for testing an integrated circuit

Circuit and method for measuring and forcing an internal voltage of...

Apparatus and methods selectively deriving a boosted voltage exceed...

Circuit and method for measuring and forcing an internal voltage of...

Circuit for contact pad isolation

Drive-current modulated output driver

Patents Applicationslast 30 patents

TEMPERATURE DIFFERENTIAL-BASED VOLTAGE OFFSET CONTROL

TEMPERATURE DIFFERENTIAL-BASED VOLTAGE OFFSET CONTROL

Circuit and method for contact pad isolation

Communication device for a logic circuit

Communication device for a logic circuit

Circuit and method for configuring CAM array margin test and operation

High density dynamic ternary-CAM memory architecture

Method for contact pad isolation

Method of reducing standby current during power down mode

Split word line ternary CAM architecture

High density dynamic ternary-CAM memory architecture

Clamp circuit with fuse options

Controller for delay locked loop circuits

Power reduction for delay locked loop circuits

Method of characterizing a delay locked loop

Method of reducing standby current during power down mode

Method for noise and power reduction for digital delay lines

Circuit and method for contact pad isolation

METHOD OF REDUCING STANDBY CURRENT DURING POWER DOWN MODE

Clamp circuit with fuse options

Circuit and method for testing an integrated circuit