Daniel Schmidt

Person

Niskayuna, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Diffusion-break region in stacked-FET integrated circuit device
- Patent number 12,324,237
- Issue date Jun 3, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Source/drain epitaxy process in stacked FET
- Patent number 12,262,552
- Issue date Mar 25, 2025
- International Business Machines Corporation
- Tsung-Sheng Kang
Information Patent Grant
Metrology data correction
- Patent number 12,020,970
- Issue date Jun 25, 2024
- International Business Machines Corporation
- Daniel Schmidt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-density resistive random-access memory array with self-aligned...
- Patent number 11,856,878
- Issue date Dec 26, 2023
- International Business Machines Corporation
- Dexin Kong
Information Patent Grant
Embedded memory pillar
- Patent number 11,751,492
- Issue date Sep 5, 2023
- International Business Machines Corporation
- Dexin Kong

Patents Applicationslast 30 patents

Information Patent Application
FVBP WITHOUT BACKSIDE Si RECESS
- Publication number 20240405112
- Publication date Dec 5, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTIMAL SCANNER MAPS AND FIELD LAYOUTS
- Publication number 20240319579
- Publication date Sep 26, 2024
- International Business Machines Corporation
- Allen Gabor
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
ORDERED NANOTREES FOR SENSING APPLICATIONS
- Publication number 20240310286
- Publication date Sep 19, 2024
- International Business Machines Corporation
- Daniel Schmidt
- B82 - NANO-TECHNOLOGY
Information Patent Application
STACKED UPPER TRANSISTOR AND LOWER TRANSISTOR
- Publication number 20240304625
- Publication date Sep 12, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID CMOS WITH FIN AND NANOSHEET ARCHITECTURES
- Publication number 20240222375
- Publication date Jul 4, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE POWER DISTRIBUTION NETWORK SUBSTRATE USING A LATTICE MATCH...
- Publication number 20240194602
- Publication date Jun 13, 2024
- International Business Machines Corporation
- Alexander Reznicek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH VOID UNDER SOURCE/DRAIN REGION FOR BACKSI...
- Publication number 20240186374
- Publication date Jun 6, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION-BREAK REGION IN STACKED-FET INTEGRATED CIRCUIT DEVICE
- Publication number 20240153951
- Publication date May 9, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EXTENDED EPITAXIAL GROWTH FOR IMPROVED CONTACT RESISTANCE
- Publication number 20240113232
- Publication date Apr 4, 2024
- International Business Machines Corporation
- Daniel Schmidt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPI GROWTH UNIFORMITY WITH SOURCE/DRAIN PLACEHOLDER
- Publication number 20240105768
- Publication date Mar 28, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCAL INTERCONNECT AT BACKSIDE TO ENABLE FLEXIBLE ROUTING ACROSS DI...
- Publication number 20240105788
- Publication date Mar 28, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE CONTACT FOR SEMICONDUCTOR DEVICE
- Publication number 20240063121
- Publication date Feb 22, 2024
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE/DRAIN EPITAXY PROCESS IN STACKED FET
- Publication number 20240030284
- Publication date Jan 25, 2024
- International Business Machines Corporation
- Tsung-Sheng Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROFILE ENGINEERING FOR DEEP TRENCHES IN A SEMICONDUCTOR DEVICE
- Publication number 20230326987
- Publication date Oct 12, 2023
- International Business Machines Corporation
- Tsung-Sheng Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH-DENSITY RESISTIVE RANDOM-ACCESS MEMORY ARRAY WITH SELF-ALIGNED...
- Publication number 20230147958
- Publication date May 11, 2023
- International Business Machines Corporation
- Dexin Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FEED-FORWARD AND UTILIZATION OF HEIGHT INFORMATION FOR METROLOGY TOOLS
- Publication number 20230143750
- Publication date May 11, 2023
- International Business Machines Corporation
- Daniel Schmidt
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
CHARACTERIZATION OF ASYMMETRIC MATERIAL DEPOSITION FOR METROLOGY
- Publication number 20230114601
- Publication date Apr 13, 2023
- International Business Machines Corporation
- Daniel Schmidt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED MEMORY PILLAR
- Publication number 20230099303
- Publication date Mar 30, 2023
- International Business Machines Corporation
- Dexin Kong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METROLOGY DATA CORRECTION
- Publication number 20230101448
- Publication date Mar 30, 2023
- International Business Machines Corporation
- Daniel SCHMIDT
- G06 - COMPUTING CALCULATING COUNTING

Daniel Schmidt

Person

Patents Grantslast 30 patents

Diffusion-break region in stacked-FET integrated circuit device

Source/drain epitaxy process in stacked FET

Metrology data correction

High-density resistive random-access memory array with self-aligned...

Embedded memory pillar

Patents Applicationslast 30 patents

FVBP WITHOUT BACKSIDE Si RECESS

OPTIMAL SCANNER MAPS AND FIELD LAYOUTS

ORDERED NANOTREES FOR SENSING APPLICATIONS

STACKED UPPER TRANSISTOR AND LOWER TRANSISTOR

HYBRID CMOS WITH FIN AND NANOSHEET ARCHITECTURES

BACKSIDE POWER DISTRIBUTION NETWORK SUBSTRATE USING A LATTICE MATCH...

SEMICONDUCTOR DEVICE WITH VOID UNDER SOURCE/DRAIN REGION FOR BACKSI...

DIFFUSION-BREAK REGION IN STACKED-FET INTEGRATED CIRCUIT DEVICE

EXTENDED EPITAXIAL GROWTH FOR IMPROVED CONTACT RESISTANCE

EPI GROWTH UNIFORMITY WITH SOURCE/DRAIN PLACEHOLDER

LOCAL INTERCONNECT AT BACKSIDE TO ENABLE FLEXIBLE ROUTING ACROSS DI...

BACKSIDE CONTACT FOR SEMICONDUCTOR DEVICE

SOURCE/DRAIN EPITAXY PROCESS IN STACKED FET

PROFILE ENGINEERING FOR DEEP TRENCHES IN A SEMICONDUCTOR DEVICE

HIGH-DENSITY RESISTIVE RANDOM-ACCESS MEMORY ARRAY WITH SELF-ALIGNED...

FEED-FORWARD AND UTILIZATION OF HEIGHT INFORMATION FOR METROLOGY TOOLS

CHARACTERIZATION OF ASYMMETRIC MATERIAL DEPOSITION FOR METROLOGY

EMBEDDED MEMORY PILLAR

METROLOGY DATA CORRECTION