Darvin R. Edwards

Person

Garland, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integration of backside heat spreader for thermal management
- Patent number 9,698,075
- Issue date Jul 4, 2017
- Texas Instruments Incorporated
- Archana Venugopal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration of backside heat spreader for thermal management
- Patent number 9,496,198
- Issue date Nov 15, 2016
- Texas Instruments Incorporated
- Archana Venugopal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having etched foil capacitor integrated into...
- Patent number 9,373,572
- Issue date Jun 21, 2016
- Texas Instruments Incorporated
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having etched foil capacitor integrated into...
- Patent number 9,165,873
- Issue date Oct 20, 2015
- Texas Instruments Incorporated
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having etched foil capacitor integrated into...
- Patent number 9,142,496
- Issue date Sep 22, 2015
- Texas Instruments Incorporated
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for contacting agglomerate terminals of semiconductor packages
- Patent number 8,716,068
- Issue date May 6, 2014
- Texas Instruments Incorporated
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having agglomerate terminals
- Patent number 8,643,165
- Issue date Feb 4, 2014
- Texas Instruments Incorporated
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array-processed stacked semiconductor packages
- Patent number 7,892,889
- Issue date Feb 22, 2011
- Texas Instruments Incorporated
- Gregory E Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rapid method for sub-critical fatigue crack growth evaluation
- Patent number 7,495,749
- Issue date Feb 24, 2009
- Texas Instruments Incorporated
- Cheryl Diane Hartfield
- C21 - METALLURGY OF IRON
Information Patent Grant
Method and apparatus to minimize power and ground bounce in a logic...
- Patent number 7,296,168
- Issue date Nov 13, 2007
- Texas Instruments Incorporated
- Darvin R. Edwards
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for high performance heat sink for multiple chip...
- Patent number 7,291,913
- Issue date Nov 6, 2007
- Texas Instruments Incorporated
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solder joints for copper metallization having reduced interfacial v...
- Patent number 7,267,861
- Issue date Sep 11, 2007
- Texas Instruments Incorporated
- Darvin R. Edwards
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Temperature field controlled scheduling for processing systems
- Patent number 7,174,194
- Issue date Feb 6, 2007
- Texas Instruments Incorporated
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for high performance heat sink for multiple chip...
- Patent number 6,979,899
- Issue date Dec 27, 2005
- Texas Instruments Incorported
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for self-leveling heat sink for multiple height d...
- Patent number 6,950,310
- Issue date Sep 27, 2005
- Texas Instruments Incorporated
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-scale assembly of chip-size packages
- Patent number 6,730,541
- Issue date May 4, 2004
- Texas Instruments Incorporated
- Katherine G. Heinen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Approach to structurally reinforcing the mechanical performance of...
- Patent number 6,586,839
- Issue date Jul 1, 2003
- Texas Instruments Incorporated
- Michael F. Chisholm
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making ball grid array columns
- Patent number 6,450,397
- Issue date Sep 17, 2002
- Texas Instruments Incorporated
- Darvin R. Edwards
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Sacrificial structures for arresting insulator cracks in semiconduc...
- Patent number 6,365,958
- Issue date Apr 2, 2002
- Texas Instruments Incorporated
- M'Hamed Ibnabdeljalil
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for attaching particles to a substrate
- Patent number 6,080,650
- Issue date Jun 27, 2000
- Texas Instruments Incorporated
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer having a cantilevered ball connection and being electric...
- Patent number 6,064,576
- Issue date May 16, 2000
- Texas Instruments Incorporated
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermal analysis system and method of operation
- Patent number 5,604,687
- Issue date Feb 18, 1997
- Texas Instruments Incorporated
- Ming J. Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for modeling an integrated chip package and method of operation
- Patent number 5,579,249
- Issue date Nov 26, 1996
- Texas Instruments Incorporated
- Darvin R. Edwards
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packaged semiconductor device having stress absorbing film
- Patent number 5,466,888
- Issue date Nov 14, 1995
- Hitachi, Ltd.
- Lim T. Beng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor device having stress absorbing film
- Patent number 5,406,028
- Issue date Apr 11, 1995
- Hitachi, Ltd.
- Lim T. Beng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip module testing
- Patent number 5,321,277
- Issue date Jun 14, 1994
- Texas Instruments Incorporated
- Steve E. Sparks
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit device having bumped power supply buses over act...
- Patent number 5,083,187
- Issue date Jan 21, 1992
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATION OF BACKSIDE HEAT SPREADER FOR THERMAL MANAGEMENT
- Publication number 20160322277
- Publication date Nov 3, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Archana Venugopal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION OF BACKSIDE HEAT SPREADER FOR THERMAL MANAGEMENT
- Publication number 20160093552
- Publication date Mar 31, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Archana Venugopal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Package Having Etched Foil Capacitor Integrated Into...
- Publication number 20160035655
- Publication date Feb 4, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CONTACTING AGGLOMERATE TERMINALS OF SEMICONDUCTOR PACKAGES
- Publication number 20140038358
- Publication date Feb 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-FINGER CAPACITOR WITH REDUCED SERIES RESISTANCE
- Publication number 20130001746
- Publication date Jan 3, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Darvin Renne Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CONTACTING AGGLOMERATE TERMINALS OF SEMICONDUCTOR PACKAGES
- Publication number 20120211889
- Publication date Aug 23, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Darvin R. EDWARDS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MODIFIED HEAT PIPE FOR PHASE CHANGE COOLING OF ELECTRONIC DEVICES
- Publication number 20100300654
- Publication date Dec 2, 2010
- Darvin Renne EDWARDS
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Application
Array-Processed Stacked Semiconductor Packages
- Publication number 20090305464
- Publication date Dec 10, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TWO-WAY HEAT EXTRACTION FROM PACKAGED SEMICONDUCTOR CHIPS
- Publication number 20090294937
- Publication date Dec 3, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Darvin Renne Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP EMBEDDED IN AN INSULATOR AND HAVING TWO-WAY HEAT...
- Publication number 20080122061
- Publication date May 29, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Darvin Renne Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TWO-WAY HEAT EXTRACTION FROM PACKAGED SEMICONDUCTOR CHIPS
- Publication number 20080073778
- Publication date Mar 27, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Darvin Renne Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Array-Processed Stacked Semiconductor Packages
- Publication number 20080023805
- Publication date Jan 31, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Rapid method for sub-critical fatigue crack growth evaluation
- Publication number 20070051437
- Publication date Mar 8, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Cheryl Diane Hartfield
- C21 - METALLURGY OF IRON
Information Patent Application
Solder joints for copper metallization having reduced interfacial v...
- Publication number 20060267157
- Publication date Nov 30, 2006
- Darvin R. Edwards
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
System and method for high performance heat sink for multiple chip...
- Publication number 20060060988
- Publication date Mar 23, 2006
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked wafer scale package
- Publication number 20060038272
- Publication date Feb 23, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for high performance heat sink for multiple chip...
- Publication number 20050146021
- Publication date Jul 7, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for self-leveling heat sink for multiple height d...
- Publication number 20050146023
- Publication date Jul 7, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for delivering power to a semiconductor device
- Publication number 20050133901
- Publication date Jun 23, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Darvin R. Edwards
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method and apparatus to minimize power and ground bounce in a logic...
- Publication number 20050132243
- Publication date Jun 16, 2005
- Darvin R. Edwards
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Chip-scale packages stacked on folded interconnector for vertical a...
- Publication number 20020114143
- Publication date Aug 22, 2002
- Gary P. Morrison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Temperature field controlled scheduling for processing systems
- Publication number 20020065049
- Publication date May 30, 2002
- Gerard Chauvel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Novel approach to structurally reinforcing the mechanical performan...
- Publication number 20020025417
- Publication date Feb 28, 2002
- Michael F. Chisholm
- B32 - LAYERED PRODUCTS
Information Patent Application
SACRIFICIAL STRUCTURES FOR ARRESTING INSULATOR CRACKS IN SEMICONDUC...
- Publication number 20020024115
- Publication date Feb 28, 2002
- M?apos;HAMED IBNABDELJALIL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER-SCALE ASSEMBY OF CHIP-SIZE PACKAGES
- Publication number 20010044197
- Publication date Nov 22, 2001
- KATHERINE G. HEINEN
- H01 - BASIC ELECTRIC ELEMENTS

Darvin R. Edwards

Person

Patents Grantslast 30 patents

Integration of backside heat spreader for thermal management

Integration of backside heat spreader for thermal management

Semiconductor package having etched foil capacitor integrated into...

Semiconductor package having etched foil capacitor integrated into...

Semiconductor package having etched foil capacitor integrated into...

Method for contacting agglomerate terminals of semiconductor packages

Semiconductor device having agglomerate terminals

Array-processed stacked semiconductor packages

Rapid method for sub-critical fatigue crack growth evaluation

Method and apparatus to minimize power and ground bounce in a logic...

System and method for high performance heat sink for multiple chip...

Solder joints for copper metallization having reduced interfacial v...

Temperature field controlled scheduling for processing systems

System and method for high performance heat sink for multiple chip...

System and method for self-leveling heat sink for multiple height d...

Wafer-scale assembly of chip-size packages

Approach to structurally reinforcing the mechanical performance of...

Method of making ball grid array columns

Sacrificial structures for arresting insulator cracks in semiconduc...

Method and apparatus for attaching particles to a substrate

Interposer having a cantilevered ball connection and being electric...

Thermal analysis system and method of operation

System for modeling an integrated chip package and method of operation

Packaged semiconductor device having stress absorbing film

Packaged semiconductor device having stress absorbing film

Multi-chip module testing

Integrated circuit device having bumped power supply buses over act...

Patents Applicationslast 30 patents

INTEGRATION OF BACKSIDE HEAT SPREADER FOR THERMAL MANAGEMENT

INTEGRATION OF BACKSIDE HEAT SPREADER FOR THERMAL MANAGEMENT

Semiconductor Package Having Etched Foil Capacitor Integrated Into...

METHOD FOR CONTACTING AGGLOMERATE TERMINALS OF SEMICONDUCTOR PACKAGES

MULTI-FINGER CAPACITOR WITH REDUCED SERIES RESISTANCE

METHOD FOR CONTACTING AGGLOMERATE TERMINALS OF SEMICONDUCTOR PACKAGES

MODIFIED HEAT PIPE FOR PHASE CHANGE COOLING OF ELECTRONIC DEVICES

Array-Processed Stacked Semiconductor Packages

TWO-WAY HEAT EXTRACTION FROM PACKAGED SEMICONDUCTOR CHIPS

SEMICONDUCTOR CHIP EMBEDDED IN AN INSULATOR AND HAVING TWO-WAY HEAT...

TWO-WAY HEAT EXTRACTION FROM PACKAGED SEMICONDUCTOR CHIPS

Array-Processed Stacked Semiconductor Packages

Rapid method for sub-critical fatigue crack growth evaluation

Solder joints for copper metallization having reduced interfacial v...

System and method for high performance heat sink for multiple chip...

Stacked wafer scale package

System and method for high performance heat sink for multiple chip...

System and method for self-leveling heat sink for multiple height d...

System and method for delivering power to a semiconductor device

Method and apparatus to minimize power and ground bounce in a logic...

Chip-scale packages stacked on folded interconnector for vertical a...

Temperature field controlled scheduling for processing systems

Novel approach to structurally reinforcing the mechanical performan...

SACRIFICIAL STRUCTURES FOR ARRESTING INSULATOR CRACKS IN SEMICONDUC...

WAFER-SCALE ASSEMBY OF CHIP-SIZE PACKAGES