David C. Fong

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Soft breakdown mode, low voltage, low power antifuse-based non-vola...
- Patent number 8,797,820
- Issue date Aug 5, 2014
- Chengdu Kiloway Electronics Inc.
- Jack Z. Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip packaging fixture using magnetic field for self-alignment
- Patent number 8,789,267
- Issue date Jul 29, 2014
- Chengdu Kiloway Electronics Inc.
- Jack Zezhong Peng
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Low voltage and low power memory cell based on nano current voltage...
- Patent number 8,259,518
- Issue date Sep 4, 2012
- Sichuan Kiloway Electronics Inc.
- Jack Z. Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming language translation systems and methods
- Patent number 8,079,027
- Issue date Dec 13, 2011
- VIA Technologies, Inc.
- David Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrically programmable fuse bit
- Patent number 7,907,465
- Issue date Mar 15, 2011
- Kilopass Technology, Inc.
- Jack Z. Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrically programmable fuse bit
- Patent number 7,609,539
- Issue date Oct 27, 2009
- Kilopass Technology, Inc.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for repairing an integrated circuit device
- Patent number 7,516,375
- Issue date Apr 7, 2009
- VIA Technologies, Inc.
- David Art Fong
- G01 - MEASURING TESTING
Information Patent Grant
Memory transistor gate oxide stress release and improved reliability
- Patent number 7,471,541
- Issue date Dec 30, 2008
- Kilopass Technology, Inc.
- David Fong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell comprising an OTP nonvolatile memory unit and a SRAM unit
- Patent number 7,277,348
- Issue date Oct 2, 2007
- KLP International, Ltd.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory transistor gate oxide stress release and improved reliability
- Patent number 7,269,047
- Issue date Sep 11, 2007
- Kilopass Technology, Inc.
- David Fong
- G11 - INFORMATION STORAGE
Information Patent Grant
Merging a hardware design language source file with a separate asse...
- Patent number 7,231,627
- Issue date Jun 12, 2007
- VIA Technologies, Inc.
- David Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combination field programmable gate array allowing dynamic reprogra...
- Patent number 7,064,973
- Issue date Jun 20, 2006
- KLP International, Ltd.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and circuits for programming of a semiconductor memory cell...
- Patent number 7,042,772
- Issue date May 9, 2006
- Kilopass Technology, Inc.
- Jianguo Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and circuits for testing programmability of a semiconductor...
- Patent number 7,031,209
- Issue date Apr 18, 2006
- Kilopass Technology, Inc.
- Jianguo Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
High density semiconductor memory cell and memory array using a sin...
- Patent number 6,856,540
- Issue date Feb 15, 2005
- Kilopass Technologies, Inc.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of testing the thin oxide of a semiconductor memory cell tha...
- Patent number 6,791,891
- Issue date Sep 14, 2004
- Kilopass Technologies, Inc.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
High density semiconductor memory cell and memory array using a sin...
- Patent number 6,777,757
- Issue date Aug 17, 2004
- Kilopass Technologies, Inc.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming methods and circuits for semiconductor memory cell and...
- Patent number 6,671,040
- Issue date Dec 30, 2003
- Kilopass Technologies, Inc.
- David Fong
- G11 - INFORMATION STORAGE
Information Patent Grant
High D.C. voltage to low D.C. voltage circuit converter
- Patent number 6,670,845
- Issue date Dec 30, 2003
- Silicon Storage Technology, Inc.
- David Fong
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
SOFT BREAKDOWN MODE, LOW VOLTAGE, LOW POWER ANTIFUSE-BASED NON-VOLA...
- Publication number 20130208525
- Publication date Aug 15, 2013
- Jack Z. Peng
- G11 - INFORMATION STORAGE
Information Patent Application
A NEW LOW VOLTAGE AND LOW POWER MEMORY CELL BASED ON NANO CURRENT V...
- Publication number 20110299344
- Publication date Dec 8, 2011
- Jack Z. Peng
- G11 - INFORMATION STORAGE
Information Patent Application
Small Chip Packaging Fixture And Method Of Using Magnetic Field Ass...
- Publication number 20110262258
- Publication date Oct 27, 2011
- Jack Zezhong Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICALLY PROGRAMMABLE FUSE BIT
- Publication number 20110216572
- Publication date Sep 8, 2011
- Kilopass Technology, Inc.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTICALLY PROGRAMMABLE FUSE BIT
- Publication number 20100091545
- Publication date Apr 15, 2010
- Jack Z. Peng
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Scan Chain Testing Using Analog Signals
- Publication number 20090039897
- Publication date Feb 12, 2009
- VIA Technologies, Inc.
- David Fong
- G01 - MEASURING TESTING
Information Patent Application
Generation and Management of Logic
- Publication number 20080127163
- Publication date May 29, 2008
- VIA Technologies, Inc.
- David Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Assertion Tester
- Publication number 20080098366
- Publication date Apr 24, 2008
- VIA TECHNOLOGIES, INC.
- David Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transferring software assertions to hardware design language code
- Publication number 20070294647
- Publication date Dec 20, 2007
- Via Technologies, Inc.
- David Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY TRANSISTOR GATE OXIDE STRESS RELEASE AND IMPROVED RELIABILITY
- Publication number 20070230232
- Publication date Oct 4, 2007
- Kilopass Technology, Inc.
- David Fong
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and systems for repairing an integrated circuit device
- Publication number 20070226556
- Publication date Sep 27, 2007
- Via Technologies, Inc.
- David Art Fong
- G01 - MEASURING TESTING
Information Patent Application
MEMORY TRANSISTOR GATE OXIDE STRESS RELEASE AND IMPROVED RELIABILITY
- Publication number 20070206417
- Publication date Sep 6, 2007
- Kilopass Technologies, Inc.
- David Fong
- G11 - INFORMATION STORAGE
Information Patent Application
Electrically programmable fuse bit
- Publication number 20070183181
- Publication date Aug 9, 2007
- Kilopass Technology, Inc.
- Jack Z. Peng
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell comprising an OTP nonvolatile memory unit and a SRAM unit
- Publication number 20070133334
- Publication date Jun 14, 2007
- KLP International Ltd.
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Application
Merging a hardware design language source file with a separate asse...
- Publication number 20060259884
- Publication date Nov 16, 2006
- Via Technologies, Inc.
- David Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mirrored LCD display
- Publication number 20060202942
- Publication date Sep 14, 2006
- Via Technologies, Inc.
- David Fong
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for generating assertions using waveforms
- Publication number 20060190882
- Publication date Aug 24, 2006
- Via Technologies, Inc.
- David Fong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Field programmable gate array logic unit and its cluster
- Publication number 20050275427
- Publication date Dec 15, 2005
- Man Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Combination field programmable gate array allowing dynamic reprogra...
- Publication number 20050169040
- Publication date Aug 4, 2005
- Jack Z. Peng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and circuits for programming of a semiconductor memory cell...
- Publication number 20040223370
- Publication date Nov 11, 2004
- Jianguo Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Methods and circuits for testing programmability of a semiconductor...
- Publication number 20040208055
- Publication date Oct 21, 2004
- Jianguo Wang
- G11 - INFORMATION STORAGE
Information Patent Application
High density semiconductor memory cell and memory array using a sin...
- Publication number 20030206467
- Publication date Nov 6, 2003
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Application
High density semiconductor memory cell and memory array using a sin...
- Publication number 20030202376
- Publication date Oct 30, 2003
- Jack Zezhong Peng
- G11 - INFORMATION STORAGE
Information Patent Application
Programming methods and circuits for semiconductor memory cell and...
- Publication number 20030063518
- Publication date Apr 3, 2003
- David Fong
- H01 - BASIC ELECTRIC ELEMENTS

David C. Fong

Person

Patents Grantslast 30 patents

Soft breakdown mode, low voltage, low power antifuse-based non-vola...

Chip packaging fixture using magnetic field for self-alignment

Low voltage and low power memory cell based on nano current voltage...

Programming language translation systems and methods

Electrically programmable fuse bit

Electrically programmable fuse bit

Methods and systems for repairing an integrated circuit device

Memory transistor gate oxide stress release and improved reliability

Memory cell comprising an OTP nonvolatile memory unit and a SRAM unit

Memory transistor gate oxide stress release and improved reliability

Merging a hardware design language source file with a separate asse...

Combination field programmable gate array allowing dynamic reprogra...

Methods and circuits for programming of a semiconductor memory cell...

Methods and circuits for testing programmability of a semiconductor...

High density semiconductor memory cell and memory array using a sin...

Method of testing the thin oxide of a semiconductor memory cell tha...

High density semiconductor memory cell and memory array using a sin...

Programming methods and circuits for semiconductor memory cell and...

High D.C. voltage to low D.C. voltage circuit converter

Patents Applicationslast 30 patents

SOFT BREAKDOWN MODE, LOW VOLTAGE, LOW POWER ANTIFUSE-BASED NON-VOLA...

A NEW LOW VOLTAGE AND LOW POWER MEMORY CELL BASED ON NANO CURRENT V...

Small Chip Packaging Fixture And Method Of Using Magnetic Field Ass...

ELECTRICALLY PROGRAMMABLE FUSE BIT

ELECTICALLY PROGRAMMABLE FUSE BIT

Systems and Methods for Scan Chain Testing Using Analog Signals

Generation and Management of Logic

Assertion Tester

Transferring software assertions to hardware design language code

MEMORY TRANSISTOR GATE OXIDE STRESS RELEASE AND IMPROVED RELIABILITY

Methods and systems for repairing an integrated circuit device

MEMORY TRANSISTOR GATE OXIDE STRESS RELEASE AND IMPROVED RELIABILITY

Electrically programmable fuse bit

Memory cell comprising an OTP nonvolatile memory unit and a SRAM unit

Merging a hardware design language source file with a separate asse...

Mirrored LCD display

System and method for generating assertions using waveforms

Field programmable gate array logic unit and its cluster

Combination field programmable gate array allowing dynamic reprogra...

Methods and circuits for programming of a semiconductor memory cell...

Methods and circuits for testing programmability of a semiconductor...

High density semiconductor memory cell and memory array using a sin...

High density semiconductor memory cell and memory array using a sin...

Programming methods and circuits for semiconductor memory cell and...