David Edward McCracken

Person

San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiprocessor node controller circuit and method
- Patent number 7,881,321
- Issue date Feb 1, 2011
- Silicon Graphics International
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor node controller circuit and method
- Patent number 7,406,086
- Issue date Jul 29, 2008
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor node controller circuit and method
- Patent number 6,751,698
- Issue date Jun 15, 2004
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for handling invalidation requests to processo...
- Patent number 6,578,115
- Issue date Jun 10, 2003
- Silicon Graphics, Inc.
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for distributing output queue space
- Patent number 6,532,501
- Issue date Mar 11, 2003
- Silicon Graphics, Inc.
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for minimizing error correction code bits in vari...
- Patent number 6,487,685
- Issue date Nov 26, 2002
- Silicon Graphics, Inc.
- James A. Stuart Fiske
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for memory page migration in a multi-processor co...
- Patent number 6,453,408
- Issue date Sep 17, 2002
- Silicon Graphics, Inc.
- James A. Stuart Fiske
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for shared memory protection in a multiprocessor...
- Patent number 6,381,681
- Issue date Apr 30, 2002
- Silicon Graphics, Inc.
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for handling invalidation requests to processo...
- Patent number 6,339,812
- Issue date Jan 15, 2002
- Silicon Graphics, Inc.
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable synchronizer for double data rate synchronous dynamic...
- Patent number 6,279,073
- Issue date Aug 21, 2001
- Silicon Graphics, Inc.
- David E. McCracken
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with switching for data isolation
- Patent number 6,215,686
- Issue date Apr 10, 2001
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with switching for data isolation
- Patent number 6,115,278
- Issue date Sep 5, 2000
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Multiprocessor Node Controller Circuit and Method
- Publication number 20090024833
- Publication date Jan 22, 2009
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiprocessor node controller circuit and method
- Publication number 20050053057
- Publication date Mar 10, 2005
- Silicon Graphics, Inc.
- Martin M. Deneroff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for handling invalidation requests to processo...
- Publication number 20020059500
- Publication date May 16, 2002
- Silicon Graphics, Inc., a Delaware corporation
- David E. McCracken
- G06 - COMPUTING CALCULATING COUNTING

David Edward McCracken

Person

Patents Grantslast 30 patents

Multiprocessor node controller circuit and method

Multiprocessor node controller circuit and method

Multiprocessor node controller circuit and method

Method and apparatus for handling invalidation requests to processo...

System and method for distributing output queue space

System and method for minimizing error correction code bits in vari...

System and method for memory page migration in a multi-processor co...

System and method for shared memory protection in a multiprocessor...

Method and apparatus for handling invalidation requests to processo...

Configurable synchronizer for double data rate synchronous dynamic...

Memory system with switching for data isolation

Memory system with switching for data isolation

Patents Applicationslast 30 patents

Multiprocessor Node Controller Circuit and Method

Multiprocessor node controller circuit and method

Method and apparatus for handling invalidation requests to processo...