David Fisch

Person

St-Sulpice, CH

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit having voltage generation circuitry for memory c...
- Patent number 9,257,155
- Issue date Feb 9, 2016
- Micron Technology, Inc.
- David E. Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having voltage generation circuitry for memory c...
- Patent number 8,659,956
- Issue date Feb 25, 2014
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including memory array having a segmented bit li...
- Patent number 8,395,937
- Issue date Mar 12, 2013
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for reducing impact of array disturbs in a semiconductor...
- Patent number 8,310,893
- Issue date Nov 13, 2012
- Micron Technology, Inc.
- Yogesh Luthra
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having voltage generation circuitry for memory c...
- Patent number 8,064,274
- Issue date Nov 22, 2011
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including memory array having a segmented bit li...
- Patent number 7,969,779
- Issue date Jun 28, 2011
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for variable memory cell refresh
- Patent number 7,619,944
- Issue date Nov 17, 2009
- Innovative Silicon ISi Sa
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including memory array having a segmented bit li...
- Patent number 7,542,340
- Issue date Jun 2, 2009
- Innovative Silicon ISi Sa
- David Fisch
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT HAVING VOLTAGE GENERATION CIRCUITRY FOR MEMORY C...
- Publication number 20140169107
- Publication date Jun 19, 2014
- Micron Technology, Inc.
- David E. FISCH
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT HAVING VOLTAGE GENERATION CIRCUITRY FOR MEMORY C...
- Publication number 20120140580
- Publication date Jun 7, 2012
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Including Memory Array Having a Segmented Bit Li...
- Publication number 20110249499
- Publication date Oct 13, 2011
- Micron Technology, Inc.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR REDUCING IMPACT OF ARRAY DISTURBS IN A SEMICONDUCTOR...
- Publication number 20110141836
- Publication date Jun 16, 2011
- Innovative Silicon Isi SA
- Yogesh Luthra
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Including Memory Array Having a Segmented Bit Li...
- Publication number 20090231898
- Publication date Sep 17, 2009
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit having voltage generation circuitry for memory c...
- Publication number 20080298139
- Publication date Dec 4, 2008
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for variable memory cell refresh
- Publication number 20080165605
- Publication date Jul 10, 2008
- Innovative Silicon S.A.
- David Fisch
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit including memory array having a segmented bit li...
- Publication number 20080013359
- Publication date Jan 17, 2008
- David Fisch
- G11 - INFORMATION STORAGE

David Fisch

Person

Patents Grantslast 30 patents

Integrated circuit having voltage generation circuitry for memory c...

Integrated circuit having voltage generation circuitry for memory c...

Integrated circuit including memory array having a segmented bit li...

Techniques for reducing impact of array disturbs in a semiconductor...

Integrated circuit having voltage generation circuitry for memory c...

Integrated circuit including memory array having a segmented bit li...

Method and apparatus for variable memory cell refresh

Integrated circuit including memory array having a segmented bit li...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT HAVING VOLTAGE GENERATION CIRCUITRY FOR MEMORY C...

INTEGRATED CIRCUIT HAVING VOLTAGE GENERATION CIRCUITRY FOR MEMORY C...

Integrated Circuit Including Memory Array Having a Segmented Bit Li...

TECHNIQUES FOR REDUCING IMPACT OF ARRAY DISTURBS IN A SEMICONDUCTOR...

Integrated Circuit Including Memory Array Having a Segmented Bit Li...

Integrated circuit having voltage generation circuitry for memory c...

Method and apparatus for variable memory cell refresh

Integrated circuit including memory array having a segmented bit li...