David Joseph Winston HANSQUINE

Person

Raleigh, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Read-assist circuits for memory bit cells employing a P-type field-...
- Patent number 10,424,392
- Issue date Sep 24, 2019
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wordline negative boost write-assist circuits for memory bit cells...
- Patent number 10,224,084
- Issue date Mar 5, 2019
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
P-type field-effect transistor (PFET)-based sense amplifiers for re...
- Patent number 10,163,490
- Issue date Dec 25, 2018
- QUALCOMM Incorporated
- Hoan Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-assist circuits for memory bit cells employing a P-type field-...
- Patent number 10,115,481
- Issue date Oct 30, 2018
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline positive boost write-assist circuits for memory bit cells e...
- Patent number 10,026,456
- Issue date Jul 17, 2018
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative supply rail positive boost write-assist circuits for memor...
- Patent number 9,984,730
- Issue date May 29, 2018
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic tag compare circuits employing P-type field-effect transist...
- Patent number 9,947,406
- Issue date Apr 17, 2018
- QUALCOMM Incorporated
- Keith Alan Bowman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Contactless data communication using in-plane magnetic fields, and...
- Patent number 9,882,609
- Issue date Jan 30, 2018
- QUALCOMM Incorporated
- Wenqing Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Wordline negative boost write-assist circuits for memory bit cells...
- Patent number 9,842,634
- Issue date Dec 12, 2017
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-assist circuits for memory bit cells employing a P-type field-...
- Patent number 9,741,452
- Issue date Aug 22, 2017
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic tag compare circuits employing P-type field-effect transist...
- Patent number 9,627,064
- Issue date Apr 18, 2017
- QUALCOMM Incorporated
- Keith Alan Bowman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Contactless data communication using in-plane magnetic fields, and...
- Patent number 9,495,899
- Issue date Nov 15, 2016
- QUALCOMM Incorporated
- Wenqing Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Configurable last level clock driver for improved energy efficiency...
- Patent number 9,429,982
- Issue date Aug 30, 2016
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock distribution using MTJ sensing
- Patent number 8,779,824
- Issue date Jul 15, 2014
- QUALCOMM Incorporated
- Wenqing Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Single wire bus interface
- Patent number 8,750,324
- Issue date Jun 10, 2014
- QUALCOMM Incorporated
- David W. Hansquine
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Temperature compensating adaptive voltage scalers (AVSs), systems,...
- Patent number 8,661,274
- Issue date Feb 25, 2014
- QUALCOMM Incorporated
- David W. Hansquine
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Built-in self test (BIST) architecture having distributed interpret...
- Patent number 7,814,380
- Issue date Oct 12, 2010
- QUALCOMM Incorporated
- Roberto Fabian Averbuj
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test (BIST) architecture having distributed interpret...
- Patent number 7,392,442
- Issue date Jun 24, 2008
- QUALCOMM Incorporated
- Roberto Fabian Averbuj
- G11 - INFORMATION STORAGE
Information Patent Grant
Tiered built-in self-test (BIST) architecture for testing distribut...
- Patent number 7,184,915
- Issue date Feb 27, 2007
- Qualcomm, Incorporated
- David W. Hansquine
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for efficiently reading and storing state metr...
- Patent number 6,757,864
- Issue date Jun 29, 2004
- Qualcomm, Incorporated
- David W. Hansquine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Decoding with partial state information on a convolutionally encode...
- Patent number 6,519,297
- Issue date Feb 11, 2003
- Qualcomm, Incorporated
- Brian K. Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Resource allocator
- Patent number 6,493,354
- Issue date Dec 10, 2002
- Qualcomm, Incorporated
- David Hansquine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Spreader architecture for direct sequence spread spectrum communica...
- Patent number 6,366,600
- Issue date Apr 2, 2002
- QUALCOMM Incorporated
- Avneesh Agrawal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High-speed ACS for Viterbi decoder implementations
- Patent number 6,333,954
- Issue date Dec 25, 2001
- QUALCOMM Incorporated
- David Hansquine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for reducing deinterleaver memory requirements th...
- Patent number 6,278,715
- Issue date Aug 21, 2001
- Qualcom Incorporated
- David Hansquine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cached chainback RAM for serial viterbi decoder
- Patent number 6,269,130
- Issue date Jul 31, 2001
- QUALCOMM Incorporated
- David Hansquine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Decoding with partial state information on a convolutionally encode...
- Patent number 6,205,186
- Issue date Mar 20, 2001
- QUALCOMM Incorporated
- Brian K. Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...
- Publication number 20190057757
- Publication date Feb 21, 2019
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Application
WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...
- Publication number 20180033465
- Publication date Feb 1, 2018
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...
- Publication number 20170316838
- Publication date Nov 2, 2017
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR EFFECTIVE CLOCK SCALING AT EXPOSED CACHE S...
- Publication number 20170090508
- Publication date Mar 30, 2017
- QUALCOMM Incorporated
- Shivam PRIYADARSHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTACTLESS DATA COMMUNICATION USING IN-PLANE MAGNETIC FIELDS, AND...
- Publication number 20170019153
- Publication date Jan 19, 2017
- QUALCOMM Incorporated
- Wenqing Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
P-TYPE FIELD-EFFECT TRANSISTOR (PFET)-BASED SENSE AMPLIFIERS FOR RE...
- Publication number 20160247555
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Hoann Huu Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...
- Publication number 20160247559
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Francois Ibrahim Atallah
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC TAG COMPARE CIRCUITS EMPLOYING P-TYPE FIELD-EFFECT TRANSIST...
- Publication number 20160247568
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Keith Alan Bowman
- G11 - INFORMATION STORAGE
Information Patent Application
WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...
- Publication number 20160247556
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS E...
- Publication number 20160247557
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
NEGATIVE SUPPLY RAIL POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMOR...
- Publication number 20160247558
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Jihoon Jeong
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE LAST LEVEL CLOCK DRIVER FOR IMPROVED ENERGY EFFICIENCY...
- Publication number 20160091918
- Publication date Mar 31, 2016
- QUALCOMM Incorporated
- Francois Ibrahim ATALLAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTACTLESS DATA COMMUNICATION USING IN-PLANE MAGNETIC FIELDS, AND...
- Publication number 20150084972
- Publication date Mar 26, 2015
- QUALCOMM Incorporated
- Wenqing Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK DISTRIBUTION USING MTJ SENSING
- Publication number 20140167831
- Publication date Jun 19, 2014
- QUALCOMM Incorporated
- Wenqing Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Temperature Compensating Adaptive Voltage Scalers (AVSs), Systems,...
- Publication number 20110004774
- Publication date Jan 6, 2011
- QUALCOMM Incorporated
- David W. Hansquine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE WIRE BUS INTERFACE
- Publication number 20100064074
- Publication date Mar 11, 2010
- QUALCOMM Incorporated
- David W. Hansquine
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Built-In Self Test (BIST) Architecture having Distributed Interpret...
- Publication number 20080215944
- Publication date Sep 4, 2008
- QUALCOMM Incorporated
- Roberto Fabian Averbuj
- G11 - INFORMATION STORAGE
Information Patent Application
Single wire and three wire bus interoperability
- Publication number 20060031618
- Publication date Feb 9, 2006
- David W. Hansquine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Single wire bus interface
- Publication number 20050259609
- Publication date Nov 24, 2005
- David W. Hansquine
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Built-in self-test (BIST) architecture having distributed interpret...
- Publication number 20050257109
- Publication date Nov 17, 2005
- Roberto Fabian Averbuj
- G11 - INFORMATION STORAGE
Information Patent Application
Tiered built-in self-test (BIST) architecture for testing distribut...
- Publication number 20040199843
- Publication date Oct 7, 2004
- David W. Hansquine
- G11 - INFORMATION STORAGE
Information Patent Application
Decoding with partial state information on a convolutionally encode...
- Publication number 20010000706
- Publication date May 3, 2001
- Brian K. Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

David Joseph Winston HANSQUINE

Person

Patents Grantslast 30 patents

Read-assist circuits for memory bit cells employing a P-type field-...

Wordline negative boost write-assist circuits for memory bit cells...

P-type field-effect transistor (PFET)-based sense amplifiers for re...

Read-assist circuits for memory bit cells employing a P-type field-...

Bitline positive boost write-assist circuits for memory bit cells e...

Negative supply rail positive boost write-assist circuits for memor...

Dynamic tag compare circuits employing P-type field-effect transist...

Contactless data communication using in-plane magnetic fields, and...

Wordline negative boost write-assist circuits for memory bit cells...

Read-assist circuits for memory bit cells employing a P-type field-...

Dynamic tag compare circuits employing P-type field-effect transist...

Contactless data communication using in-plane magnetic fields, and...

Configurable last level clock driver for improved energy efficiency...

Clock distribution using MTJ sensing

Single wire bus interface

Temperature compensating adaptive voltage scalers (AVSs), systems,...

Built-in self test (BIST) architecture having distributed interpret...

Built-in self-test (BIST) architecture having distributed interpret...

Tiered built-in self-test (BIST) architecture for testing distribut...

Method and apparatus for efficiently reading and storing state metr...

Decoding with partial state information on a convolutionally encode...

Resource allocator

Spreader architecture for direct sequence spread spectrum communica...

High-speed ACS for Viterbi decoder implementations

System and method for reducing deinterleaver memory requirements th...

Cached chainback RAM for serial viterbi decoder

Decoding with partial state information on a convolutionally encode...

Patents Applicationslast 30 patents

READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...

WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...

READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...

METHOD AND APPARATUS FOR EFFECTIVE CLOCK SCALING AT EXPOSED CACHE S...

CONTACTLESS DATA COMMUNICATION USING IN-PLANE MAGNETIC FIELDS, AND...

P-TYPE FIELD-EFFECT TRANSISTOR (PFET)-BASED SENSE AMPLIFIERS FOR RE...

READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-...

DYNAMIC TAG COMPARE CIRCUITS EMPLOYING P-TYPE FIELD-EFFECT TRANSIST...

WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS...

BITLINE POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS E...

NEGATIVE SUPPLY RAIL POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMOR...

CONFIGURABLE LAST LEVEL CLOCK DRIVER FOR IMPROVED ENERGY EFFICIENCY...

CONTACTLESS DATA COMMUNICATION USING IN-PLANE MAGNETIC FIELDS, AND...

CLOCK DISTRIBUTION USING MTJ SENSING

Temperature Compensating Adaptive Voltage Scalers (AVSs), Systems,...

SINGLE WIRE BUS INTERFACE

Built-In Self Test (BIST) Architecture having Distributed Interpret...

Single wire and three wire bus interoperability

Single wire bus interface

Built-in self-test (BIST) architecture having distributed interpret...

Tiered built-in self-test (BIST) architecture for testing distribut...

Decoding with partial state information on a convolutionally encode...