David K. Chung

Person

Lake Elsinore, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
High speed receive equalizer architecture
- Patent number 7,623,600
- Issue date Nov 24, 2009
- Broadcom Corporation
- Afshin Momtaz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transceiver system and method supporting variable rates and multipl...
- Patent number 7,324,548
- Issue date Jan 29, 2008
- Broadcom Corporation
- Vikram Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and circuitry for implementing first-in first-out structure
- Patent number 7,205,792
- Issue date Apr 17, 2007
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuitry for implementing first-in first-out structure
- Patent number 7,167,024
- Issue date Jan 23, 2007
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuitry for implementing first-in first-out structure
- Patent number 6,963,220
- Issue date Nov 8, 2005
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuitry for implementing first-in first-out structure
- Patent number 6,963,221
- Issue date Nov 8, 2005
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuitry for implementing first-in first-out structure
- Patent number 6,940,306
- Issue date Sep 6, 2005
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CDR lock detector with hysteresis
- Patent number 6,833,763
- Issue date Dec 21, 2004
- Broadcom Corporation
- David Kyong-sik Chung
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
CDR lock detector with hysteresis
- Patent number 6,747,518
- Issue date Jun 8, 2004
- Broadcom Corporation
- David Kyong-sik Chung
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Methods and circuitry for implementing first-in first-out structure
- Patent number 6,696,854
- Issue date Feb 24, 2004
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multimode frequency synthesizer having high loop gain in frequency...
- Patent number 5,861,766
- Issue date Jan 19, 1999
- Western Digital Corporation
- Howard Anthony Baumer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing transient noise in integrated cir...
- Patent number 4,947,063
- Issue date Aug 7, 1990
- Western Digital Corporation
- Timothy G. O'Shaughnessy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Schmitt trigger adapted to interface between different transistor a...
- Patent number 4,904,884
- Issue date Feb 27, 1990
- Western Digital Corporation
- Timothy G. O'Shaughnessy
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
HIGH SPEED RECEIVE EQUALIZER ARCHITECTURE
- Publication number 20100046601
- Publication date Feb 25, 2010
- BROADCOM CORPORATION
- Afshin Momtaz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRANSCEIVER SYSTEM AND METHOD SUPPORTING VARIABLE RATES AND MULTIPL...
- Publication number 20080130679
- Publication date Jun 5, 2008
- Vikram Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Decision feedback equalizer circuit
- Publication number 20050271136
- Publication date Dec 8, 2005
- David Kyong-Sik Chung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High speed receive equalizer architecture
- Publication number 20050271169
- Publication date Dec 8, 2005
- Afshin Momtaz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Resistor compensation apparatus
- Publication number 20050248382
- Publication date Nov 10, 2005
- David Kyong-Sik Chung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and circuitry for implementing first-in first-out structure
- Publication number 20050128846
- Publication date Jun 16, 2005
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and circuitry for implementing first-in first-out structure
- Publication number 20050122815
- Publication date Jun 9, 2005
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and circuitry for implementing first-in first-out structure
- Publication number 20050117428
- Publication date Jun 2, 2005
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CDR lock detector with hysteresis
- Publication number 20050062546
- Publication date Mar 24, 2005
- Broadcom Corporation
- David Kyong-sik Chung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CDR LOCK DETECTOR WITH HYSTERESIS
- Publication number 20040196106
- Publication date Oct 7, 2004
- Broadcom Corporation
- David Kyong-sik Chung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and circuitry for implementing first-in first-out structure
- Publication number 20040158657
- Publication date Aug 12, 2004
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and circuitry for implementing first-in first-out structure
- Publication number 20040156250
- Publication date Aug 12, 2004
- Broadcom Corporation
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transceiver system and method supporting variable rates and multipl...
- Publication number 20040086003
- Publication date May 6, 2004
- Vikram Natarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Phase lock loop with cycle drop and add circuitry
- Publication number 20040047440
- Publication date Mar 11, 2004
- BROADCOM CORPORATION
- Afshin Momtaz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Methods and circuitry for implementing first-in first-out structure
- Publication number 20030052708
- Publication date Mar 20, 2003
- BROADCOM CORPORATION
- Afshin Momtaz
- G06 - COMPUTING CALCULATING COUNTING

David K. Chung

Person

Patents Grantslast 30 patents

High speed receive equalizer architecture

Transceiver system and method supporting variable rates and multipl...

Methods and circuitry for implementing first-in first-out structure

Methods and circuitry for implementing first-in first-out structure

Methods and circuitry for implementing first-in first-out structure

Methods and circuitry for implementing first-in first-out structure

Methods and circuitry for implementing first-in first-out structure

CDR lock detector with hysteresis

CDR lock detector with hysteresis

Methods and circuitry for implementing first-in first-out structure

Multimode frequency synthesizer having high loop gain in frequency...

Method and apparatus for reducing transient noise in integrated cir...

Schmitt trigger adapted to interface between different transistor a...

Patents Applicationslast 30 patents

HIGH SPEED RECEIVE EQUALIZER ARCHITECTURE

TRANSCEIVER SYSTEM AND METHOD SUPPORTING VARIABLE RATES AND MULTIPL...

Decision feedback equalizer circuit

High speed receive equalizer architecture

Resistor compensation apparatus

Methods and circuitry for implementing first-in first-out structure

Methods and circuitry for implementing first-in first-out structure

Methods and circuitry for implementing first-in first-out structure

CDR lock detector with hysteresis

CDR LOCK DETECTOR WITH HYSTERESIS

Methods and circuitry for implementing first-in first-out structure

Methods and circuitry for implementing first-in first-out structure

Transceiver system and method supporting variable rates and multipl...

Phase lock loop with cycle drop and add circuitry

Methods and circuitry for implementing first-in first-out structure