David Naura

Person

Aix en Provence, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Passive contactless integrated circuit comprising a flag for monito...
- Patent number 8,410,910
- Issue date Apr 2, 2013
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for configuring a memory space divided into memory banks
- Patent number 8,180,992
- Issue date May 15, 2012
- STMicroelectronics S.A.
- Christophe Moreaux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Antenna impedance modulation method
- Patent number 8,022,889
- Issue date Sep 20, 2011
- STMicroelectronics S.A.
- Pierre Rizzo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for block writing in a memory
- Patent number 7,881,124
- Issue date Feb 1, 2011
- STMicroelectronics S.A.
- Ahmed Kari
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for dividing a number by a fraction having a number in the f...
- Patent number 7,801,940
- Issue date Sep 21, 2010
- STMicroelectronics S.A.
- Christophe Moreaux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Persistent volatile memory with sense amplifier and discharge switch
- Patent number 7,679,945
- Issue date Mar 16, 2010
- STMicroelectronics S.A.
- Pierre Rizzo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for generating a clock signal
- Patent number 7,675,341
- Issue date Mar 9, 2010
- STMicroelectronics S.A.
- Christophe Moreaux
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock generation method and device for decoding from an asynchronou...
- Patent number 7,614,564
- Issue date Nov 10, 2009
- STMicroelectronics S.A.
- Ahmed Kari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary frequency divider
- Patent number 7,602,878
- Issue date Oct 13, 2009
- STMicroelectronics S.A.
- Christophe Moreaux
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for checking block erasing of a memory and circuit thereof
- Patent number 7,460,401
- Issue date Dec 2, 2008
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for checking the execution of a write command for...
- Patent number 7,447,080
- Issue date Nov 4, 2008
- STMicroelectronics S.A.
- Ahmed Kari
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with a data memory protected against UV erasure
- Patent number 7,436,702
- Issue date Oct 14, 2008
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Procedure and device for identifying an operating mode of a control...
- Patent number 7,237,157
- Issue date Jun 26, 2007
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for erasing/programming a non-volatile electrically erasable...
- Patent number 7,012,837
- Issue date Mar 14, 2006
- STMicroelectronics, S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Word programmable EEPROM memory comprising column selection latches...
- Patent number 6,714,450
- Issue date Mar 30, 2004
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and associated method for the erasure or programming of a m...
- Patent number 6,621,737
- Issue date Sep 16, 2003
- STMicroelectronics SA
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of operating an integrated circuit with memory having an in...
- Patent number 6,538,931
- Issue date Mar 25, 2003
- STMicroelectronics S.A.
- Mohamad Chehadi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for page mode writing in an electrically erasable/programmab...
- Patent number 6,504,791
- Issue date Jan 7, 2003
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory incorporating column register and method of writing in said...
- Patent number 6,385,096
- Issue date May 7, 2002
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Grant
Serial access integrated circuit memory
- Patent number 6,359,822
- Issue date Mar 19, 2002
- STMicroelectronics S.A.
- Sébastien Zink
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of selecting a memory access line and an access line decoder...
- Patent number 6,324,117
- Issue date Nov 27, 2001
- STMicroelectronics S.A.
- Sébastien Zink
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory incorporating column register and method of writing in said...
- Patent number 6,307,792
- Issue date Oct 23, 2001
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture of a non-volatile electrically erasable and programmab...
- Patent number 6,275,413
- Issue date Aug 14, 2001
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for the reading of EEPROM cells
- Patent number 6,219,277
- Issue date Apr 17, 2001
- STMicroelectronics S.A.
- Jean Devin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method to verify the integrity of the decoding circuits of a memory
- Patent number 6,212,112
- Issue date Apr 3, 2001
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Device for neutralization in an integrated circuit
- Patent number 6,157,227
- Issue date Dec 5, 2000
- SGS-Thomson Microelectronics S.A.
- Thierry Giovinazzi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ring oscillator using CMOS technology
- Patent number 6,127,898
- Issue date Oct 3, 2000
- SGS-Thomson Microelectroncs S.A.
- David Naura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with memory comprising an internal circuit for t...
- Patent number 6,125,063
- Issue date Sep 26, 2000
- STMicroelectronics S.A.
- Mohamad Chehadi
- G11 - INFORMATION STORAGE
Information Patent Grant
Device to neutralize an electronic circuit when it is being powered...
- Patent number 6,125,022
- Issue date Sep 26, 2000
- SGS-Thomas Microelectronics S.A.
- David Naura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Externally controlled power on reset device for non-volatile memory...
- Patent number 6,118,709
- Issue date Sep 12, 2000
- STMicroelectronics S.A.
- Sebastien Zink
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR SECURE EXECUTING OF A SECURITY RELATED PROCESS
- Publication number 20230019987
- Publication date Jan 19, 2023
- THALES DIS FRANCE SAS
- Philippe LOUBET MOUNDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR BLOCK WRITING IN A MEMORY
- Publication number 20090094410
- Publication date Apr 9, 2009
- STMicroelectronics S.A.
- Ahmed Kari
- G11 - INFORMATION STORAGE
Information Patent Application
PASSIVE CONTACTLESS INTEGRATED CIRCUIT COMPRISING A FLAG FOR MONITO...
- Publication number 20090066483
- Publication date Mar 12, 2009
- STMicroelectronics S.A.
- David Naura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BINARY FREQUENCY DIVIDER
- Publication number 20090022260
- Publication date Jan 22, 2009
- STMicroelectronics S.A.
- Christophe Moreaux
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND DEVICE FOR GENERATING A CLOCK SIGNAL
- Publication number 20080211562
- Publication date Sep 4, 2008
- STMicroelectronics S.A.
- Christophe Moreaux
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PERSISTENT VOLATILE MEMORY CELL
- Publication number 20080212360
- Publication date Sep 4, 2008
- STMicroelectronics S.A.
- Pierre Rizzo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ANTENNA IMPEDANCE MODULATION METHOD
- Publication number 20080212346
- Publication date Sep 4, 2008
- STMicroelectronics S.A.
- Pierre Rizzo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR CONFIGURING A MEMORY SPACE DIVIDED INTO MEMORY BANKS
- Publication number 20080209155
- Publication date Aug 28, 2008
- STMicroelectronics S.A.
- Christophe Moreaux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR CHECKING THE EXECUTION OF A WRITE COMMAND FOR...
- Publication number 20070153581
- Publication date Jul 5, 2007
- STMicroelectronics S.A.
- Ahmed Kari
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR DIVIDING A NUMBER BY A FRACTION HAVING A NUMBER IN THE F...
- Publication number 20070146174
- Publication date Jun 28, 2007
- STMicroelectronics S.A.
- Christophe Moreaux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR GENERATING VARIABLE NUMBERS
- Publication number 20070063879
- Publication date Mar 22, 2007
- STMicroelectronics S.A.
- Christophe Moreaux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT WITH A DATA MEMORY PROTECTED AGAINST UV ERASURE
- Publication number 20070058430
- Publication date Mar 15, 2007
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR CHECKING THE BLOCK ERASING OF A MEMORY
- Publication number 20070053233
- Publication date Mar 8, 2007
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
Clock generation method and device for decoding from an asynchronou...
- Publication number 20060115003
- Publication date Jun 1, 2006
- STMicroelectronics S.A.
- Ahmed Kari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for erasing/programming a non-volatile electrically erasable...
- Publication number 20050207230
- Publication date Sep 22, 2005
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
Procedure and device for identifying an operating mode of a control...
- Publication number 20050015533
- Publication date Jan 20, 2005
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
Two-threshold comparator insensitive to its environment
- Publication number 20040217793
- Publication date Nov 4, 2004
- STMicroelectronics S.A.
- Bertrand Bertrand
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Word programmable EEPROM memory comprising column selection latches...
- Publication number 20020163832
- Publication date Nov 7, 2002
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and associated method for the erasure or programming of a m...
- Publication number 20020126534
- Publication date Sep 12, 2002
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INCORPORATING COLUMN REGISTER AND METHOD OF WRITING IN SAID...
- Publication number 20020031015
- Publication date Mar 14, 2002
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE

David Naura

Person

Patents Grantslast 30 patents

Passive contactless integrated circuit comprising a flag for monito...

Method for configuring a memory space divided into memory banks

Antenna impedance modulation method

Method for block writing in a memory

Method for dividing a number by a fraction having a number in the f...

Persistent volatile memory with sense amplifier and discharge switch

Method and device for generating a clock signal

Clock generation method and device for decoding from an asynchronou...

Binary frequency divider

Method for checking block erasing of a memory and circuit thereof

Method and device for checking the execution of a write command for...

Integrated circuit with a data memory protected against UV erasure

Procedure and device for identifying an operating mode of a control...

Method for erasing/programming a non-volatile electrically erasable...

Word programmable EEPROM memory comprising column selection latches...

Circuit and associated method for the erasure or programming of a m...

Methods of operating an integrated circuit with memory having an in...

Method for page mode writing in an electrically erasable/programmab...

Memory incorporating column register and method of writing in said...

Serial access integrated circuit memory

Method of selecting a memory access line and an access line decoder...

Memory incorporating column register and method of writing in said...

Architecture of a non-volatile electrically erasable and programmab...

Device and method for the reading of EEPROM cells

Method to verify the integrity of the decoding circuits of a memory

Device for neutralization in an integrated circuit

Ring oscillator using CMOS technology

Integrated circuit with memory comprising an internal circuit for t...

Device to neutralize an electronic circuit when it is being powered...

Externally controlled power on reset device for non-volatile memory...

Patents Applicationslast 30 patents

METHOD FOR SECURE EXECUTING OF A SECURITY RELATED PROCESS

METHOD FOR BLOCK WRITING IN A MEMORY

PASSIVE CONTACTLESS INTEGRATED CIRCUIT COMPRISING A FLAG FOR MONITO...

BINARY FREQUENCY DIVIDER

METHOD AND DEVICE FOR GENERATING A CLOCK SIGNAL

PERSISTENT VOLATILE MEMORY CELL

ANTENNA IMPEDANCE MODULATION METHOD

METHOD FOR CONFIGURING A MEMORY SPACE DIVIDED INTO MEMORY BANKS

METHOD AND DEVICE FOR CHECKING THE EXECUTION OF A WRITE COMMAND FOR...

METHOD FOR DIVIDING A NUMBER BY A FRACTION HAVING A NUMBER IN THE F...

METHOD FOR GENERATING VARIABLE NUMBERS

INTEGRATED CIRCUIT WITH A DATA MEMORY PROTECTED AGAINST UV ERASURE

METHOD FOR CHECKING THE BLOCK ERASING OF A MEMORY

Clock generation method and device for decoding from an asynchronou...

Method for erasing/programming a non-volatile electrically erasable...

Procedure and device for identifying an operating mode of a control...

Two-threshold comparator insensitive to its environment

Word programmable EEPROM memory comprising column selection latches...

Circuit and associated method for the erasure or programming of a m...

MEMORY INCORPORATING COLUMN REGISTER AND METHOD OF WRITING IN SAID...