Deepraj S. Puar

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Graphics controller integrated circuit without memory interface
- Patent number 7,106,619
- Issue date Sep 12, 2006
- NeoMagic Corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics controller integrated circuit without memory interface
- Patent number 6,920,077
- Issue date Jul 19, 2005
- NeoMagic Corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics controller integrated circuit without memory interface
- Patent number 6,771,532
- Issue date Aug 3, 2004
- NeoMagic Corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics controller integrated circuit without memory interface
- Patent number 6,356,497
- Issue date Mar 12, 2002
- NeoMagic Corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NMOS dynamic content-addressable-memory CAM cell with self-booting...
- Patent number 6,078,513
- Issue date Jun 20, 2000
- NeoMagic Corp.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Graphics controller integrated circuit without memory interface pin...
- Patent number 6,041,010
- Issue date Mar 21, 2000
- NeoMagic Corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics controller integrated circuit without memory interface
- Patent number 5,703,806
- Issue date Dec 30, 1997
- NeoMagic Corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics controller integrated circuit without memory interface
- Patent number 5,650,955
- Issue date Jul 22, 1997
- NeoMagic Corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic logic having power-down mode with periodic clock refresh fo...
- Patent number 5,587,672
- Issue date Dec 24, 1996
- NeoMagic Corp.
- Ravi Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple probing of an auxilary test pad which allows for reliable...
- Patent number 5,506,499
- Issue date Apr 9, 1996
- NeoMagic Corp.
- Deepraj S. Puar
- G11 - INFORMATION STORAGE
Information Patent Grant
Shunt circuit for electrostatic discharge protection
- Patent number 5,287,241
- Issue date Feb 15, 1994
- Cirrus Logic, Inc.
- Deepraj S. Puar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Input protection device for integrated circuits
- Patent number 4,786,956
- Issue date Nov 22, 1988
- North American Philips Corporation, Signetics Division
- Deepraj S. Puar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Depletion-mode FET for the regulation of the on-chip generated subs...
- Patent number 4,739,191
- Issue date Apr 19, 1988
- Signetics Corporation
- Deepraj S. Puar
- G05 - CONTROLLING REGULATING
Information Patent Grant
Sense and refresh amplifier circuit
- Patent number 4,508,980
- Issue date Apr 2, 1985
- Signetics Corporation
- Deepraj S. Puar
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory array
- Patent number 4,342,102
- Issue date Jul 27, 1982
- Signetics Corporation
- Deepraj S. Puar
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
GRAPHICS CONTROLLER INTEGRATED CIRCUIT WITHOUT MEMORY INTERFACE
- Publication number 20120188260
- Publication date Jul 26, 2012
- Intellectual Ventures I LLC
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Graphics Controller Integrated Circuit without Memory Interface
- Publication number 20060208764
- Publication date Sep 21, 2006
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Graphics Controller Integrated Circuit without Memory Interface
- Publication number 20050180225
- Publication date Aug 18, 2005
- NEOMAGIC CORPORATION
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Graphics controller integrated circuit without memory interface
- Publication number 20040179015
- Publication date Sep 16, 2004
- NEOMAGIC CORPORATION
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Graphics controller integrated circuit without memory interface
- Publication number 20020149560
- Publication date Oct 17, 2002
- NeoMagic Corporation, a California corporation
- Deepraj S. Puar
- G06 - COMPUTING CALCULATING COUNTING

Deepraj S. Puar

Person

Patents Grantslast 30 patents

Graphics controller integrated circuit without memory interface

Graphics controller integrated circuit without memory interface

Graphics controller integrated circuit without memory interface

Graphics controller integrated circuit without memory interface

NMOS dynamic content-addressable-memory CAM cell with self-booting...

Graphics controller integrated circuit without memory interface pin...

Graphics controller integrated circuit without memory interface

Graphics controller integrated circuit without memory interface

Dynamic logic having power-down mode with periodic clock refresh fo...

Multiple probing of an auxilary test pad which allows for reliable...

Shunt circuit for electrostatic discharge protection

Input protection device for integrated circuits

Depletion-mode FET for the regulation of the on-chip generated subs...

Sense and refresh amplifier circuit

Semiconductor memory array

Patents Applicationslast 30 patents

GRAPHICS CONTROLLER INTEGRATED CIRCUIT WITHOUT MEMORY INTERFACE

Graphics Controller Integrated Circuit without Memory Interface

Graphics Controller Integrated Circuit without Memory Interface

Graphics controller integrated circuit without memory interface

Graphics controller integrated circuit without memory interface