Dioscoro A. Merilo

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming package-on-package struc...
- Patent number 9,922,955
- Issue date Mar 20, 2018
- STATS ChipPAC Pte. Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming base leads from base sub...
- Patent number 9,589,910
- Issue date Mar 7, 2017
- STATS ChipPAC Pte. Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a wafer level package wi...
- Patent number 9,589,876
- Issue date Mar 7, 2017
- STATS ChipPAC Pte. Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including pre-fabricated shielding frame dispo...
- Patent number 9,406,619
- Issue date Aug 2, 2016
- STATS ChipPAC Pte. Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with removable backing element ha...
- Patent number 9,337,161
- Issue date May 10, 2016
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
RDL patterning with package on package system
- Patent number 9,293,385
- Issue date Mar 22, 2016
- Stats Chippac Ltd.
- Reza Argenty Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming prefabricated heat sprea...
- Patent number 9,257,357
- Issue date Feb 9, 2016
- STATS ChipPAC, Ltd.
- Frederick R. Dahilig
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die and method of forming noise absorbing regions bet...
- Patent number 9,236,352
- Issue date Jan 12, 2016
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming wafer level die integration
- Patent number 9,142,514
- Issue date Sep 22, 2015
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of mounting die with TSV in cavity...
- Patent number 9,064,876
- Issue date Jun 23, 2015
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming wafer-level multi-row et...
- Patent number 8,993,376
- Issue date Mar 31, 2015
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming vertical interconnect st...
- Patent number 8,890,328
- Issue date Nov 18, 2014
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe interposer over semiconductor die and TSV substrate for v...
- Patent number 8,866,275
- Issue date Oct 21, 2014
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit package system with removable backing element ha...
- Patent number 8,810,017
- Issue date Aug 19, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and apparatus for wafer level integration of components
- Patent number 8,722,457
- Issue date May 13, 2014
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with pad connection and method...
- Patent number 8,723,324
- Issue date May 13, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interlock and method of ma...
- Patent number 8,617,933
- Issue date Dec 31, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a wafer level package wi...
- Patent number 8,546,189
- Issue date Oct 1, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded integrated circuit package-on-package system
- Patent number 8,546,929
- Issue date Oct 1, 2013
- Stats Chippac Ltd.
- You Yang Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mountable integrated circuit package system with mountable integrat...
- Patent number 8,536,692
- Issue date Sep 17, 2013
- Stats Chippac Ltd.
- Heap Hoe Kuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming bond wires between semic...
- Patent number 8,525,344
- Issue date Sep 3, 2013
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming prefabricated heat sprea...
- Patent number 8,518,749
- Issue date Aug 27, 2013
- STATS ChipPAC, Ltd.
- Frederick R. Dahilig
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit leaded stacked package system
- Patent number 8,513,542
- Issue date Aug 20, 2013
- Stats Chippac Ltd.
- Heap Hoe Kuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wirebondless wafer level package with plated bumps and interconnects
- Patent number 8,502,376
- Issue date Aug 6, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming base leads from base sub...
- Patent number 8,435,835
- Issue date May 7, 2013
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming leadframe interposer ove...
- Patent number 8,409,922
- Issue date Apr 2, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit packaging system with multiple row leads and met...
- Patent number 8,377,750
- Issue date Feb 19, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with shielded package and metho...
- Patent number 8,304,286
- Issue date Nov 6, 2012
- Stats Chippac Ltd.
- Reza Argenty Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of mounting die with TSV in cavity...
- Patent number 8,263,434
- Issue date Sep 11, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level die integration and method
- Patent number 8,241,954
- Issue date Aug 14, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Integrated Circuit Package System with Removable Backing Element Ha...
- Publication number 20140332955
- Publication date Nov 13, 2014
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming a Wafer Level Package wi...
- Publication number 20130341789
- Publication date Dec 26, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Prefabricated Heat Sprea...
- Publication number 20130256866
- Publication date Oct 3, 2013
- Frederick R. Dahilig
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Base Leads from Base Sub...
- Publication number 20130214398
- Publication date Aug 22, 2013
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Leadframe Interposer Ove...
- Publication number 20130154076
- Publication date Jun 20, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MA...
- Publication number 20120299196
- Publication date Nov 29, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Mounting Die with TSV in Cavity...
- Publication number 20120292785
- Publication date Nov 22, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wafer Level Multi-Row Et...
- Publication number 20120273927
- Publication date Nov 1, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Level Die Integration and Method
- Publication number 20120276691
- Publication date Nov 1, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...
- Publication number 20120261808
- Publication date Oct 18, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Bond Wires Between Semic...
- Publication number 20120217643
- Publication date Aug 30, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND MET...
- Publication number 20120146203
- Publication date Jun 14, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...
- Publication number 20120139121
- Publication date Jun 7, 2012
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...
- Publication number 20120139104
- Publication date Jun 7, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Mounting Pre-Fabricated Shieldin...
- Publication number 20120112328
- Publication date May 10, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming Noise Absorbing Regions Bet...
- Publication number 20120091567
- Publication date Apr 19, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Vertical Interconnect St...
- Publication number 20120074567
- Publication date Mar 29, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Leadframe Interposer Ove...
- Publication number 20120061814
- Publication date Mar 15, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor Device and Method of Forming Base Leads from Base Sub...
- Publication number 20120056314
- Publication date Mar 8, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wafer-Level Multi-Row Et...
- Publication number 20120038064
- Publication date Feb 16, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM
- Publication number 20110248411
- Publication date Oct 13, 2011
- Tsz Yin Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Package-on-Package Struc...
- Publication number 20110215458
- Publication date Sep 8, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wafer Level Multi-Row Et...
- Publication number 20110215449
- Publication date Sep 8, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wirebondless Wafer Level Package with Plated Bumps and Interconnects
- Publication number 20110204512
- Publication date Aug 25, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING
- Publication number 20110147899
- Publication date Jun 23, 2011
- Frederick Rodriguez Dahilig
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHO...
- Publication number 20110140247
- Publication date Jun 16, 2011
- Reza Argenty Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...
- Publication number 20110140251
- Publication date Jun 16, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE SYSTEM WITH DIE SUPP...
- Publication number 20110129965
- Publication date Jun 2, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTUR...
- Publication number 20110079899
- Publication date Apr 7, 2011
- You Yang Ong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor Device and Method of Mounting Die with TSV in Cavity...
- Publication number 20110024888
- Publication date Feb 3, 2011
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS

Dioscoro A. Merilo

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming package-on-package struc...

Semiconductor device and method of forming base leads from base sub...

Semiconductor device and method of forming a wafer level package wi...

Semiconductor device including pre-fabricated shielding frame dispo...

Integrated circuit package system with removable backing element ha...

RDL patterning with package on package system

Semiconductor device and method of forming prefabricated heat sprea...

Semiconductor die and method of forming noise absorbing regions bet...

Semiconductor device and method of forming wafer level die integration

Semiconductor device and method of mounting die with TSV in cavity...

Semiconductor device and method of forming wafer-level multi-row et...

Semiconductor device and method of forming vertical interconnect st...

Leadframe interposer over semiconductor die and TSV substrate for v...

Integrated circuit package system with removable backing element ha...

System and apparatus for wafer level integration of components

Integrated circuit packaging system with pad connection and method...

Integrated circuit packaging system with interlock and method of ma...

Semiconductor device and method of forming a wafer level package wi...

Embedded integrated circuit package-on-package system

Mountable integrated circuit package system with mountable integrat...

Semiconductor device and method of forming bond wires between semic...

Semiconductor device and method of forming prefabricated heat sprea...

Integrated circuit leaded stacked package system

Wirebondless wafer level package with plated bumps and interconnects

Semiconductor device and method of forming base leads from base sub...

Semiconductor device and method of forming leadframe interposer ove...

Integrated circuit packaging system with multiple row leads and met...

Integrated circuit packaging system with shielded package and metho...

Semiconductor device and method of mounting die with TSV in cavity...

Wafer level die integration and method

Patents Applicationslast 30 patents

Integrated Circuit Package System with Removable Backing Element Ha...

Semiconductor Device and Method of Forming a Wafer Level Package wi...

Semiconductor Device and Method of Forming Prefabricated Heat Sprea...

Semiconductor Device and Method of Forming Base Leads from Base Sub...

Semiconductor Device and Method of Forming Leadframe Interposer Ove...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MA...

Semiconductor Device and Method of Mounting Die with TSV in Cavity...

Semiconductor Device and Method of Forming Wafer Level Multi-Row Et...

Wafer Level Die Integration and Method

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...

Semiconductor Device and Method of Forming Bond Wires Between Semic...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND MET...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...

Semiconductor Device and Method of Mounting Pre-Fabricated Shieldin...

Semiconductor Die and Method of Forming Noise Absorbing Regions Bet...

Semiconductor Device and Method of Forming Vertical Interconnect St...

Semiconductor Device and Method of Forming Leadframe Interposer Ove...

Semiconductor Device and Method of Forming Base Leads from Base Sub...

Semiconductor Device and Method of Forming Wafer-Level Multi-Row Et...

INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM

Semiconductor Device and Method of Forming Package-on-Package Struc...

Semiconductor Device and Method of Forming Wafer Level Multi-Row Et...

Wirebondless Wafer Level Package with Plated Bumps and Interconnects

INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHO...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...

METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE SYSTEM WITH DIE SUPP...

EMBEDDED INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTUR...

Semiconductor Device and Method of Mounting Die with TSV in Cavity...