Dirk Efferenn

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Process for removing a residue from a metal structure on a semicond...
- Patent number 7,413,993
- Issue date Aug 19, 2008
- Infineon Technologies AG
- Ronald Gottzein
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for masking a recess in a structure having a high aspect ratio
- Patent number 7,261,829
- Issue date Aug 28, 2007
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for providing whisker-free aluminum metal lines or aluminum...
- Patent number 7,157,381
- Issue date Jan 2, 2007
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligning mask
- Patent number 7,125,778
- Issue date Oct 24, 2006
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor structure
- Patent number 6,964,912
- Issue date Nov 15, 2005
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a shallow trench isolation for n- and p-channe...
- Patent number 6,770,530
- Issue date Aug 3, 2004
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for filling depressions on a semiconductor wafer
- Patent number 6,716,720
- Issue date Apr 6, 2004
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Process for removing a residue from a metal structure on a semicond...
- Publication number 20060108324
- Publication date May 25, 2006
- Ronald Gottzein
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHOD FOR PROVIDING WHISKER-FREE ALUMINUM METAL LINES OR ALUMINUM...
- Publication number 20050277300
- Publication date Dec 15, 2005
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for masking a recess in a structure with a large aspect ratio
- Publication number 20050224451
- Publication date Oct 13, 2005
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a semiconductor structure
- Publication number 20040157390
- Publication date Aug 12, 2004
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing a shallow trench isolation for n- and p- chann...
- Publication number 20030181019
- Publication date Sep 25, 2003
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for filling depressions on a semiconductor wafer
- Publication number 20030166327
- Publication date Sep 4, 2003
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a self-aligning mask
- Publication number 20030040184
- Publication date Feb 27, 2003
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS

Dirk Efferenn

Person

Patents Grantslast 30 patents

Process for removing a residue from a metal structure on a semicond...

Method for masking a recess in a structure having a high aspect ratio

Method for providing whisker-free aluminum metal lines or aluminum...

Method for fabricating a self-aligning mask

Method for fabricating a semiconductor structure

Method for producing a shallow trench isolation for n- and p-channe...

Method for filling depressions on a semiconductor wafer

Patents Applicationslast 30 patents

Process for removing a residue from a metal structure on a semicond...

METHOD FOR PROVIDING WHISKER-FREE ALUMINUM METAL LINES OR ALUMINUM...

Method for masking a recess in a structure with a large aspect ratio

Method for fabricating a semiconductor structure

Method for producing a shallow trench isolation for n- and p- chann...

Method for filling depressions on a semiconductor wafer

Method for fabricating a self-aligning mask