Dominik LUBELEY

Person

Verl, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Time-synchronized input and/or output of signals with a selectable...
- Patent number 12,124,290
- Issue date Oct 22, 2024
- dSPACE GmbH
- Dominik Lubeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer-implemented method for creating a hierarchical block diagram
- Patent number 12,079,601
- Issue date Sep 3, 2024
- dSPACE GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer-implemented method for restructuring a predefined distribu...
- Patent number 11,843,514
- Issue date Dec 12, 2023
- dSPACE GmbH
- Heiko Kalte
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for producing an association list
- Patent number 11,586,793
- Issue date Feb 21, 2023
- dSPACE GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for programming a programmable gate array in a distributed c...
- Patent number 11,442,884
- Issue date Sep 13, 2022
- dspace digital signal processing and control engineering GmbH
- Andreas Agne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, computer-based system and computer program product for plan...
- Patent number 11,222,159
- Issue date Jan 11, 2022
- dspace digital signal processing and control engineering GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Procedure for reviewing an FPGA-program
- Patent number 11,187,748
- Issue date Nov 30, 2021
- dspace digital signal processing and control engineering GmbH
- Heiko Kalte
- G01 - MEASURING TESTING
Information Patent Grant
Method for troubleshooting the program logic of a system of distrib...
- Patent number 11,017,141
- Issue date May 25, 2021
- dspace digital signal processing and control engineering GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental generation of an FPGA implementation with a graph-based...
- Patent number 10,706,196
- Issue date Jul 7, 2020
- dspace digital signal processing and control engineering GmbH
- Dominik Lubeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental generation of an FPGA implementation with a graph-based...
- Patent number 10,671,783
- Issue date Jun 2, 2020
- dspace digital signal processing and control engineering GmbH
- Dominik Lubeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for creating an FPGA netlist
- Patent number 10,394,989
- Issue date Aug 27, 2019
- dspace digital signal processing and control engineering GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for detecting the topology of electrical wiring
- Patent number 10,224,930
- Issue date Mar 5, 2019
- dspace digital signal processing and control engineering GmbH
- Dominik Lubeley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for determining the power consumption of a programmable logi...
- Patent number 10,102,325
- Issue date Oct 16, 2018
- dspace digital signal processing and control engineering GmbH
- Dominik Lubeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for automatically generating a netlist of an FPGA program
- Patent number 9,870,440
- Issue date Jan 16, 2018
- dspace digital signal processing and control engineering GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for accelerated access to signals of a programmab...
- Patent number 9,628,085
- Issue date Apr 18, 2017
- dspace digital signal processing and control engineering GmbH
- Heiko Kalte
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR PREPARING AND PROVIDING AN FPGA BUILD RESULT OF AN FPGA...
- Publication number 20240176938
- Publication date May 30, 2024
- dSPACE GmbH
- Martin KRONMUELLER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR DETECTING ERRORS IN ROUTES AND CALCULATIONS W...
- Publication number 20240028457
- Publication date Jan 25, 2024
- dSPACE GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR EFFECTIVELY INCREASING A MEMORY ON AN FPGA
- Publication number 20230418752
- Publication date Dec 28, 2023
- dSPACE GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PROGRAMMING AN FPGA
- Publication number 20230418324
- Publication date Dec 28, 2023
- dSPACE GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR DOCUMENTING COMPUTING STEPS OF A REAL TIME SYSTEM EXECUT...
- Publication number 20230333892
- Publication date Oct 19, 2023
- dSPACE GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR CHANGING A BITWIDTH OF AN FPGA CONFIGURATION
- Publication number 20230198532
- Publication date Jun 22, 2023
- dSPACE GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER-IMPLEMENTED METHOD FOR CREATING A HIERARCHICAL BLOCK DIAGRAM
- Publication number 20230195430
- Publication date Jun 22, 2023
- dSPACE GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR DATA COMMUNICATION BETWEEN SUBREGIONS OF AN FPGA
- Publication number 20230195661
- Publication date Jun 22, 2023
- dSPACE GmbH
- Heiko Kalte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR THE TIME-SYNCHRONISED INPUT AND/OR OUTPUT OF SIGNALS WIT...
- Publication number 20230131079
- Publication date Apr 27, 2023
- dSPACE GmbH
- Dominik Lubeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF ADDING ANOTHER CIRCUIT COMPONENT
- Publication number 20230082540
- Publication date Mar 16, 2023
- dSPACE GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PROGRAMMING AN FPGA
- Publication number 20220360265
- Publication date Nov 10, 2022
- dSPACE GmbH
- Heiko KALTE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR DIVIDING SIMULATION MODELS UP BETWEEN A PROCESSOR AND AN...
- Publication number 20220309218
- Publication date Sep 29, 2022
- dSPACE GmbH
- Dominik Lubeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER-IMPLEMENTED METHOD FOR RESTRUCTURING A PREDEFINED DISTRIBU...
- Publication number 20220060389
- Publication date Feb 24, 2022
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD FOR PROGRAMMING A PROGRAMMABLE GATE ARRAY IN A DISTRIBUTED C...
- Publication number 20210303501
- Publication date Sep 30, 2021
- dSpace digital signal processing and control engineering GmbH
- Andreas AGNE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, COMPUTER-BASED SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PLAN...
- Publication number 20210256190
- Publication date Aug 19, 2021
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR TROUBLESHOOTING THE PROGRAM LOGIC OF A SYSTEM OF DISTRIB...
- Publication number 20200364392
- Publication date Nov 19, 2020
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER NETWORK WITH A FIRST AND A SECOND SYNCHRONIZING SIGNAL TRA...
- Publication number 20200145486
- Publication date May 7, 2020
- dSpace digital signal processing and control engineering GmbH
- Peter AREND
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROCEDURE FOR REVIEWING AN FPGA-PROGRAM
- Publication number 20200132766
- Publication date Apr 30, 2020
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G01 - MEASURING TESTING
Information Patent Application
INCREMENTAL GENERATION OF AN FPGA IMPLEMENTATION WITH A GRAPH-BASED...
- Publication number 20190213294
- Publication date Jul 11, 2019
- dSpace digital signal processing and control engineering GmbH
- Dominik LUBELEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PRODUCING AN ASSOCIATION LIST
- Publication number 20190147129
- Publication date May 16, 2019
- dSPACE digital signal processing and control engin eering GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR READING OUT VARIABLES FROM AN FPGA
- Publication number 20190138310
- Publication date May 9, 2019
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR DETECTING THE TOPOLOGY OF ELECTRICAL WIRING
- Publication number 20180323784
- Publication date Nov 8, 2018
- dSpace digital signal processing and control engineering GmbH
- Dominik Lubeley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR CREATING AN FPGA NETLIST
- Publication number 20170329877
- Publication date Nov 16, 2017
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR TEMPORALLY SYNCHRONIZING THE OUTPUT AND/OR TEMPORALLY SY...
- Publication number 20170329732
- Publication date Nov 16, 2017
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR ACCELERATED ACCESS TO SIGNALS OF A PROGRAMMAB...
- Publication number 20170126232
- Publication date May 4, 2017
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR DETERMINING THE POWER CONSUMPTION OF A PROGRAMMABLE LOGI...
- Publication number 20170116363
- Publication date Apr 27, 2017
- dSpace digital signal processing and control engineering GmbH
- Dominik LUBELEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR AUTOMATICALLY GENERATING A NETLIST OF AN FPGA PROGRAM
- Publication number 20150331983
- Publication date Nov 19, 2015
- dSpace digital signal processing and control engineering GmbH
- Heiko KALTE
- G06 - COMPUTING CALCULATING COUNTING

Dominik LUBELEY

Person

Patents Grantslast 30 patents

Time-synchronized input and/or output of signals with a selectable...

Computer-implemented method for creating a hierarchical block diagram

Computer-implemented method for restructuring a predefined distribu...

Method for producing an association list

Method for programming a programmable gate array in a distributed c...

Method, computer-based system and computer program product for plan...

Procedure for reviewing an FPGA-program

Method for troubleshooting the program logic of a system of distrib...

Incremental generation of an FPGA implementation with a graph-based...

Incremental generation of an FPGA implementation with a graph-based...

Method for creating an FPGA netlist

Method for detecting the topology of electrical wiring

Method for determining the power consumption of a programmable logi...

Method for automatically generating a netlist of an FPGA program

Method and device for accelerated access to signals of a programmab...

Patents Applicationslast 30 patents

METHOD FOR PREPARING AND PROVIDING AN FPGA BUILD RESULT OF AN FPGA...

METHOD AND DEVICE FOR DETECTING ERRORS IN ROUTES AND CALCULATIONS W...

METHOD FOR EFFECTIVELY INCREASING A MEMORY ON AN FPGA

METHOD FOR PROGRAMMING AN FPGA

METHOD FOR DOCUMENTING COMPUTING STEPS OF A REAL TIME SYSTEM EXECUT...

METHOD FOR CHANGING A BITWIDTH OF AN FPGA CONFIGURATION

COMPUTER-IMPLEMENTED METHOD FOR CREATING A HIERARCHICAL BLOCK DIAGRAM

METHOD FOR DATA COMMUNICATION BETWEEN SUBREGIONS OF AN FPGA

METHOD FOR THE TIME-SYNCHRONISED INPUT AND/OR OUTPUT OF SIGNALS WIT...

METHOD OF ADDING ANOTHER CIRCUIT COMPONENT

METHOD FOR PROGRAMMING AN FPGA

METHOD FOR DIVIDING SIMULATION MODELS UP BETWEEN A PROCESSOR AND AN...

COMPUTER-IMPLEMENTED METHOD FOR RESTRUCTURING A PREDEFINED DISTRIBU...

METHOD FOR PROGRAMMING A PROGRAMMABLE GATE ARRAY IN A DISTRIBUTED C...

METHOD, COMPUTER-BASED SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PLAN...

METHOD FOR TROUBLESHOOTING THE PROGRAM LOGIC OF A SYSTEM OF DISTRIB...

COMPUTER NETWORK WITH A FIRST AND A SECOND SYNCHRONIZING SIGNAL TRA...

PROCEDURE FOR REVIEWING AN FPGA-PROGRAM

INCREMENTAL GENERATION OF AN FPGA IMPLEMENTATION WITH A GRAPH-BASED...

METHOD FOR PRODUCING AN ASSOCIATION LIST

METHOD FOR READING OUT VARIABLES FROM AN FPGA

METHOD FOR DETECTING THE TOPOLOGY OF ELECTRICAL WIRING

METHOD FOR CREATING AN FPGA NETLIST

METHOD FOR TEMPORALLY SYNCHRONIZING THE OUTPUT AND/OR TEMPORALLY SY...

METHOD AND DEVICE FOR ACCELERATED ACCESS TO SIGNALS OF A PROGRAMMAB...

METHOD FOR DETERMINING THE POWER CONSUMPTION OF A PROGRAMMABLE LOGI...

METHOD FOR AUTOMATICALLY GENERATING A NETLIST OF AN FPGA PROGRAM