El Mehdi Bazizi

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Gradient doping epitaxy in superjunction to improve breakdown voltage
- Patent number 12,074,196
- Issue date Aug 27, 2024
- Applied Materials, Inc.
- Ashish Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric FET for FDSOI devices
- Patent number 11,929,433
- Issue date Mar 12, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Ignasi Cortes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming alignment marks
- Patent number 11,899,376
- Issue date Feb 13, 2024
- Applied Materials, Inc.
- Prayudi Lianto
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Graded doping in power devices
- Patent number 11,705,490
- Issue date Jul 18, 2023
- Applied Materials, Inc.
- Ashish Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress incorporation in semiconductor devices
- Patent number 11,699,755
- Issue date Jul 11, 2023
- Applied Materials, Inc.
- Ashish Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully self-aligned via
- Patent number 11,437,274
- Issue date Sep 6, 2022
- Micromaterials LLC
- Regina Freed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric FET for FDSOI devices
- Patent number 11,245,032
- Issue date Feb 8, 2022
- GLOBALFOUNDRIES U.S. INC.
- Ignasi Cortes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Doped through-contact structures
- Patent number 11,145,726
- Issue date Oct 12, 2021
- Applied Materials, Inc.
- Sushant Mittal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Laterally double diffused metal oxide semiconductor (LDMOS) device...
- Patent number 10,930,777
- Issue date Feb 23, 2021
- GLOBALFOUNDRIES U.S. INC.
- Ignasi Cortes Mayol
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method employing three-dimensional (3D) emulation of in-...
- Patent number 10,733,354
- Issue date Aug 4, 2020
- GLOBALFOUNDRIES Inc.
- Hojin Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field-effect transistors with a grown silicon-germanium channel
- Patent number 10,680,065
- Issue date Jun 9, 2020
- GlobalFoundries Inc.
- George R. Mulfinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully depleted silicon on insulator (FDSOI) lateral double-diffused...
- Patent number 10,497,803
- Issue date Dec 3, 2019
- GLOBALFOUNDRIES Inc.
- Ignasi Cortes Mayol
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND DEVICES FOR REDUCED FLOATING BODY EFFECT IN ADVANCED DRAM
- Publication number 20250227915
- Publication date Jul 10, 2025
- Applied Materials, Inc.
- Ashish PAL
Information Patent Application
SELF-ALIGNING BACKSIDE GATE CONNECTION
- Publication number 20250218870
- Publication date Jul 3, 2025
- Applied Materials, Inc.
- Ashish PAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOTTOM-UP DIELECTRIC GAP-FILL FOR DEVICE ISOLATION DURING SOURCE/DR...
- Publication number 20250212458
- Publication date Jun 26, 2025
- Applied Materials, Inc.
- Gregory COSTRINI
Information Patent Application
METALLIC SOURCE/DRAIN WITH STRESS FOR ADVANCED LOGIC TRANSISTORS
- Publication number 20250212459
- Publication date Jun 26, 2025
- Applied Materials, Inc.
- Nicolas BREIL
Information Patent Application
ISOLATION FORMATION METHOD IN HIGH-ASPECT RATIO CMOS STACKED DEVICES
- Publication number 20250212496
- Publication date Jun 26, 2025
- Applied Materials, Inc.
- Sai Hooi YEONG
Information Patent Application
VIA SHAPING BETWEEN METAL LAYERS FOR CONTROLLED RESISTANCE
- Publication number 20250140604
- Publication date May 1, 2025
- Applied Materials, Inc.
- Sefa Dag
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR AIRGAP SPACER AND FABRICATION METHODS
- Publication number 20250113577
- Publication date Apr 3, 2025
- Applied Materials, Inc.
- Veeraraghavan S. Basker
Information Patent Application
STRUCTURE AND FABRICATION METHOD OF PERIPHERAL TRANSISTOR WITH EPI-...
- Publication number 20240407170
- Publication date Dec 5, 2024
- Applied Materials, Inc.
- Chang Seok Kang
Information Patent Application
METHODS OF REDUCING BACKSIDE CONTACT RESISTANCE
- Publication number 20240332388
- Publication date Oct 3, 2024
- Applied Materials, Inc.
- Byeong Chan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REPLACEMENT SOURCE/DRAIN CONTACT METHOD IN COMPLEMENTARY FIELD EFFE...
- Publication number 20240332297
- Publication date Oct 3, 2024
- Applied Materials, Inc.
- Ashish PAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES CONTAINING BI-METALLIC SILICIDE WITH REDUCED...
- Publication number 20240313079
- Publication date Sep 19, 2024
- Applied Materials, Inc.
- Sefa Dag
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VOID-FREE STRESS INCORPORATION IN SEMICONDUCTOR DEVICES
- Publication number 20240290883
- Publication date Aug 29, 2024
- Applied Materials, Inc.
- Sai Hooi Yeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS INCORPORATION IN SEMICONDUCTOR DEVICES
- Publication number 20240290884
- Publication date Aug 29, 2024
- Applied Materials, Inc.
- El Mehdi Bazizi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED MOBILITY IN SEMICONDUCTOR DEVICES
- Publication number 20240290885
- Publication date Aug 29, 2024
- Applied Materials, Inc.
- Sai Hooi Yeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON CARBIDE TRANSISTOR WITH CHANNEL COUNTER-DOPING AND POCKET-D...
- Publication number 20240258375
- Publication date Aug 1, 2024
- Applied Materials, Inc.
- Ashish Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INNER SPACER LINER FOR GATE-ALL-AROUND DEVICE
- Publication number 20240234544
- Publication date Jul 11, 2024
- Applied Materials, Inc.
- Sai Hooi Yeong
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
INNER SPACER LINER FOR GATE-ALL-AROUND DEVICE
- Publication number 20240234531
- Publication date Jul 11, 2024
- Applied Materials, Inc.
- Sai Hooi Yeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTILAYER INNER SPACER FOR GATE-ALL-AROUND DEVICE
- Publication number 20240194757
- Publication date Jun 13, 2024
- Applied Materials, Inc.
- Sai Hooi Yeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING ALIGNMENT MARKS
- Publication number 20240069448
- Publication date Feb 29, 2024
- Applied Materials, Inc.
- Prayudi LIANTO
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
INTEGRATING STRAIN SiGe CHANNEL PMOS FOR GAA CMOS TECHNOLOGY
- Publication number 20240014214
- Publication date Jan 11, 2024
- Applied Materials, Inc.
- Sai Hooi Yeong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS INCORPORATION IN SEMICONDUCTOR DEVICES
- Publication number 20230299199
- Publication date Sep 21, 2023
- Applied Materials, Inc.
- Ashish Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE ALL AROUND BACKSIDE POWER RAIL WITH DIFFUSION BREAK
- Publication number 20230260909
- Publication date Aug 17, 2023
- Applied Materials, Inc.
- Andrew Yeoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE ALL AROUND BACKSIDE POWER RAIL FORMATION WITH MULTI-COLOR BACK...
- Publication number 20230260908
- Publication date Aug 17, 2023
- Applied Materials, Inc.
- Andrew Yeoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE ALL AROUND TRANSISTOR ARCHITECTURE WITH FILL-IN DIELECTRIC MAT...
- Publication number 20230170400
- Publication date Jun 1, 2023
- Applied Materials, Inc.
- Ashish Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED WIDE BACKSIDE POWER RAIL CONTACTS TO MULTIPLE TRANSIST...
- Publication number 20230064183
- Publication date Mar 2, 2023
- Applied Materials, Inc.
- Suketu Arun Parikh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE POWER RAIL TO DEEP VIAS
- Publication number 20230068312
- Publication date Mar 2, 2023
- Applied Materials, Inc.
- Suketu Arun Parikh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE DRAIN FORMATION IN GATE ALL AROUND TRANSISTOR
- Publication number 20230067331
- Publication date Mar 2, 2023
- Applied Materials, Inc.
- Ashish Pal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF ULTRA THINNING OF WAFER
- Publication number 20230061392
- Publication date Mar 2, 2023
- Applied Materials, Inc.
- Suketu Arun Parikh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GRADIENT DOPING EPITAXY IN SUPERJUNCTION TO IMPROVE BREAKDOWN VOLTAGE
- Publication number 20230008858
- Publication date Jan 12, 2023
- Applied Materials, Inc.
- Ashish PAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY SELF-ALIGNED VIA
- Publication number 20220359289
- Publication date Nov 10, 2022
- Micromaterials LLC.
- Regina Freed
- H01 - BASIC ELECTRIC ELEMENTS

El Mehdi Bazizi

Person

Patents Grantslast 30 patents

Gradient doping epitaxy in superjunction to improve breakdown voltage

Asymmetric FET for FDSOI devices

Methods for forming alignment marks

Graded doping in power devices

Stress incorporation in semiconductor devices

Fully self-aligned via

Asymmetric FET for FDSOI devices

Doped through-contact structures

Laterally double diffused metal oxide semiconductor (LDMOS) device...

System and method employing three-dimensional (3D) emulation of in-...

Field-effect transistors with a grown silicon-germanium channel

Fully depleted silicon on insulator (FDSOI) lateral double-diffused...

Patents Applicationslast 30 patents

METHODS AND DEVICES FOR REDUCED FLOATING BODY EFFECT IN ADVANCED DRAM

SELF-ALIGNING BACKSIDE GATE CONNECTION

BOTTOM-UP DIELECTRIC GAP-FILL FOR DEVICE ISOLATION DURING SOURCE/DR...

METALLIC SOURCE/DRAIN WITH STRESS FOR ADVANCED LOGIC TRANSISTORS

ISOLATION FORMATION METHOD IN HIGH-ASPECT RATIO CMOS STACKED DEVICES

VIA SHAPING BETWEEN METAL LAYERS FOR CONTROLLED RESISTANCE

SEMICONDUCTOR AIRGAP SPACER AND FABRICATION METHODS

STRUCTURE AND FABRICATION METHOD OF PERIPHERAL TRANSISTOR WITH EPI-...

METHODS OF REDUCING BACKSIDE CONTACT RESISTANCE

REPLACEMENT SOURCE/DRAIN CONTACT METHOD IN COMPLEMENTARY FIELD EFFE...

SEMICONDUCTOR DEVICES CONTAINING BI-METALLIC SILICIDE WITH REDUCED...

VOID-FREE STRESS INCORPORATION IN SEMICONDUCTOR DEVICES

STRESS INCORPORATION IN SEMICONDUCTOR DEVICES

ENHANCED MOBILITY IN SEMICONDUCTOR DEVICES

SILICON CARBIDE TRANSISTOR WITH CHANNEL COUNTER-DOPING AND POCKET-D...

INNER SPACER LINER FOR GATE-ALL-AROUND DEVICE

INNER SPACER LINER FOR GATE-ALL-AROUND DEVICE

MULTILAYER INNER SPACER FOR GATE-ALL-AROUND DEVICE

METHODS FOR FORMING ALIGNMENT MARKS

INTEGRATING STRAIN SiGe CHANNEL PMOS FOR GAA CMOS TECHNOLOGY

STRESS INCORPORATION IN SEMICONDUCTOR DEVICES

GATE ALL AROUND BACKSIDE POWER RAIL WITH DIFFUSION BREAK

GATE ALL AROUND BACKSIDE POWER RAIL FORMATION WITH MULTI-COLOR BACK...

GATE ALL AROUND TRANSISTOR ARCHITECTURE WITH FILL-IN DIELECTRIC MAT...

SELF-ALIGNED WIDE BACKSIDE POWER RAIL CONTACTS TO MULTIPLE TRANSIST...

BACKSIDE POWER RAIL TO DEEP VIAS

SOURCE DRAIN FORMATION IN GATE ALL AROUND TRANSISTOR

METHOD OF ULTRA THINNING OF WAFER

GRADIENT DOPING EPITAXY IN SUPERJUNCTION TO IMPROVE BREAKDOWN VOLTAGE

FULLY SELF-ALIGNED VIA