Elliot A. Sowadsky

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pipeline throughput via parallel out-of-order execution of adds and...
- Patent number 6,195,745
- Issue date Feb 27, 2001
- Advanced Micro Devices, Inc.
- Elliot A. Sowadsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized binary adder and comparator having an implicit constant f...
- Patent number 5,923,579
- Issue date Jul 13, 1999
- Advanced Micro Devices, Inc.
- Larry Widigen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operand cache addressed by the instruction address for reducing lat...
- Patent number 5,919,256
- Issue date Jul 6, 1999
- Advanced Micro Devices, Inc.
- Larry Widigen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for determining if an operand lies within an e...
- Patent number 5,822,786
- Issue date Oct 13, 1998
- Advanced Micro Devices, Inc.
- Larry Widigen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline throughput via parallel out-of-order execution of adds and...
- Patent number 5,802,339
- Issue date Sep 1, 1998
- Advanced Micro Devices
- Elliot A. Sowadsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized binary adders and comparators for inputs having different...
- Patent number 5,699,279
- Issue date Dec 16, 1997
- Advanced Micro Devices, Inc.
- Larry Widigen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having primary integer execution unit and supplemental in...
- Patent number 5,675,758
- Issue date Oct 7, 1997
- Advanced Micro Devices, Inc.
- Elliot A. Sowadsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Superscalar execution unit for sequential instruction pointer updat...
- Patent number 5,590,351
- Issue date Dec 31, 1996
- Advanced Micro Devices, Inc.
- Elliot A. Sowadsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized binary adders and comparators for inputs having different...
- Patent number 5,517,440
- Issue date May 14, 1996
- NexGen, Inc.
- Larry Widigen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized binary adders and comparators for inputs having different...
- Patent number 5,418,736
- Issue date May 23, 1995
- NexGen, Inc.
- Larry Widigen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized binary adder and comparator having an implicit constant f...
- Patent number 5,394,351
- Issue date Feb 28, 1995
- NexGen, Inc.
- Larry Widigen
- G06 - COMPUTING CALCULATING COUNTING

Elliot A. Sowadsky

Person

Patents Grantslast 30 patents

Pipeline throughput via parallel out-of-order execution of adds and...

Optimized binary adder and comparator having an implicit constant f...

Operand cache addressed by the instruction address for reducing lat...

Apparatus and method for determining if an operand lies within an e...

Pipeline throughput via parallel out-of-order execution of adds and...

Optimized binary adders and comparators for inputs having different...

Processor having primary integer execution unit and supplemental in...

Superscalar execution unit for sequential instruction pointer updat...

Optimized binary adders and comparators for inputs having different...

Optimized binary adders and comparators for inputs having different...

Optimized binary adder and comparator having an implicit constant f...