Emmanuel Espiritu

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Reliable semiconductor packages
- Patent number 12,211,863
- Issue date Jan 28, 2025
- UTAC HEADQUARTERS PTE. LTD.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interposer structure and m...
- Patent number 9,659,897
- Issue date May 23, 2017
- STATS ChipPAC Pte. Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interposer structure and m...
- Patent number 9,355,983
- Issue date May 31, 2016
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with coreless substrate and met...
- Patent number 9,305,809
- Issue date Apr 5, 2016
- Stats Chippac Ltd.
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with planarity control and meth...
- Patent number 9,293,351
- Issue date Mar 22, 2016
- Stats Chippac Ltd.
- Byung Tai Do
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Chip scale module package in BGA semiconductor package
- Patent number 9,281,300
- Issue date Mar 8, 2016
- STATS ChipPAC, Ltd.
- Leo A. Merilo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with bumps and method of manufa...
- Patent number 9,076,737
- Issue date Jul 7, 2015
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with island terminals and embed...
- Patent number 9,059,151
- Issue date Jun 16, 2015
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with side solderable leads and...
- Patent number 9,048,228
- Issue date Jun 2, 2015
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with a lead and method of manuf...
- Patent number 9,035,440
- Issue date May 19, 2015
- Stats Chippac Ltd.
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming EWLB package with stando...
- Patent number 9,006,031
- Issue date Apr 14, 2015
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with bonding in via
- Patent number 9,000,579
- Issue date Apr 7, 2015
- Stats Chippac Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming wafer-level multi-row et...
- Patent number 8,993,376
- Issue date Mar 31, 2015
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with die paddles and method of...
- Patent number 8,936,971
- Issue date Jan 20, 2015
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with lead frame and method of m...
- Patent number 8,912,046
- Issue date Dec 16, 2014
- Stats Chippac Ltd.
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe interposer over semiconductor die and TSV substrate for v...
- Patent number 8,866,275
- Issue date Oct 21, 2014
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit packaging system with plated leads and method of...
- Patent number 8,809,119
- Issue date Aug 19, 2014
- Stats Chippac Ltd.
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with protective coating and met...
- Patent number 8,803,300
- Issue date Aug 12, 2014
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with island terminals and metho...
- Patent number 8,802,501
- Issue date Aug 12, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with pad connection and method...
- Patent number 8,723,324
- Issue date May 13, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with array contacts and method...
- Patent number 8,723,338
- Issue date May 13, 2014
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interlock and method of ma...
- Patent number 8,669,649
- Issue date Mar 11, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with leads and method of manufa...
- Patent number 8,643,166
- Issue date Feb 4, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interlock and method of ma...
- Patent number 8,617,933
- Issue date Dec 31, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with locking interconnects and...
- Patent number 8,604,596
- Issue date Dec 10, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with connection supports and me...
- Patent number 8,508,026
- Issue date Aug 13, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with multi-row leads and method...
- Patent number 8,502,358
- Issue date Aug 6, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with shaped lead and method of...
- Patent number 8,502,357
- Issue date Aug 6, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with dual connection and method...
- Patent number 8,482,109
- Issue date Jul 9, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with multiple row leads and met...
- Patent number 8,455,993
- Issue date Jun 4, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Making an Optical Semiconductor...
- Publication number 20230036239
- Publication date Feb 2, 2023
- UTAC Headquarters Pte. Ltd.
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming an Optical Semiconductor...
- Publication number 20220384505
- Publication date Dec 1, 2022
- UTAC Headquarters Pte. Ltd.
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE SEMICONDUCTOR PACKAGES
- Publication number 20210366963
- Publication date Nov 25, 2021
- UTAC Headquarters Pte. Ltd.
- Il Kwon SHIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SIDE SOLDERABLE LEADS AND...
- Publication number 20150084172
- Publication date Mar 26, 2015
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ARRAY CONTACTS AND METHOD...
- Publication number 20140048919
- Publication date Feb 20, 2014
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFA...
- Publication number 20130154115
- Publication date Jun 20, 2013
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Leadframe Interposer Ove...
- Publication number 20130154076
- Publication date Jun 20, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLANARITY CONTROL AND METH...
- Publication number 20130099367
- Publication date Apr 25, 2013
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL CONNECTION AND METHOD...
- Publication number 20130075883
- Publication date Mar 28, 2013
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming EWLB Package With Stando...
- Publication number 20120326337
- Publication date Dec 27, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEAD AND METHOD OF MANUF...
- Publication number 20120326285
- Publication date Dec 27, 2012
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MA...
- Publication number 20120299196
- Publication date Nov 29, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wafer Level Multi-Row Et...
- Publication number 20120273927
- Publication date Nov 1, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LOCKING INTERCONNECTS AND...
- Publication number 20120241947
- Publication date Sep 27, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEVELING STANDOFF AND METH...
- Publication number 20120241926
- Publication date Sep 27, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...
- Publication number 20120139121
- Publication date Jun 7, 2012
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...
- Publication number 20120139104
- Publication date Jun 7, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-ROW LEADS AND METHOD...
- Publication number 20120133033
- Publication date May 31, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONNECTION SUPPORTS AND ME...
- Publication number 20120133036
- Publication date May 31, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...
- Publication number 20120104585
- Publication date May 3, 2012
- Emmanuel Espiritu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MA...
- Publication number 20120074548
- Publication date Mar 29, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DIE PADDLES AND METHOD OF...
- Publication number 20120068363
- Publication date Mar 22, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PADDLE MOLDING AND METHOD...
- Publication number 20120068318
- Publication date Mar 22, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Leadframe Interposer Ove...
- Publication number 20120061814
- Publication date Mar 15, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor Device and Method of Forming Wafer-Level Multi-Row Et...
- Publication number 20120038064
- Publication date Feb 16, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISLAND TERMINALS AND METHO...
- Publication number 20120018866
- Publication date Jan 26, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISLAND TERMINALS AND EMBED...
- Publication number 20120018865
- Publication date Jan 26, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND MET...
- Publication number 20110291251
- Publication date Dec 1, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERMEDIATE PAD AND ME...
- Publication number 20110233752
- Publication date Sep 29, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFA...
- Publication number 20110233753
- Publication date Sep 29, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS

Emmanuel Espiritu

Person

Patents Grantslast 30 patents

Reliable semiconductor packages

Integrated circuit packaging system with interposer structure and m...

Integrated circuit packaging system with interposer structure and m...

Integrated circuit packaging system with coreless substrate and met...

Integrated circuit packaging system with planarity control and meth...

Chip scale module package in BGA semiconductor package

Integrated circuit packaging system with bumps and method of manufa...

Integrated circuit packaging system with island terminals and embed...

Integrated circuit packaging system with side solderable leads and...

Integrated circuit packaging system with a lead and method of manuf...

Semiconductor device and method of forming EWLB package with stando...

Integrated circuit package system with bonding in via

Semiconductor device and method of forming wafer-level multi-row et...

Integrated circuit packaging system with die paddles and method of...

Integrated circuit packaging system with lead frame and method of m...

Leadframe interposer over semiconductor die and TSV substrate for v...

Integrated circuit packaging system with plated leads and method of...

Integrated circuit packaging system with protective coating and met...

Integrated circuit packaging system with island terminals and metho...

Integrated circuit packaging system with pad connection and method...

Integrated circuit packaging system with array contacts and method...

Integrated circuit packaging system with interlock and method of ma...

Integrated circuit packaging system with leads and method of manufa...

Integrated circuit packaging system with interlock and method of ma...

Integrated circuit packaging system with locking interconnects and...

Integrated circuit packaging system with connection supports and me...

Integrated circuit packaging system with multi-row leads and method...

Integrated circuit packaging system with shaped lead and method of...

Integrated circuit packaging system with dual connection and method...

Integrated circuit packaging system with multiple row leads and met...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Making an Optical Semiconductor...

Semiconductor Device and Method of Forming an Optical Semiconductor...

RELIABLE SEMICONDUCTOR PACKAGES

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SIDE SOLDERABLE LEADS AND...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ARRAY CONTACTS AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFA...

Semiconductor Device and Method of Forming Leadframe Interposer Ove...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLANARITY CONTROL AND METH...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL CONNECTION AND METHOD...

Semiconductor Device and Method of Forming EWLB Package With Stando...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEAD AND METHOD OF MANUF...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MA...

Semiconductor Device and Method of Forming Wafer Level Multi-Row Et...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LOCKING INTERCONNECTS AND...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEVELING STANDOFF AND METH...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-ROW LEADS AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONNECTION SUPPORTS AND ME...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DIE PADDLES AND METHOD OF...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PADDLE MOLDING AND METHOD...

Semiconductor Device and Method of Forming Leadframe Interposer Ove...

Semiconductor Device and Method of Forming Wafer-Level Multi-Row Et...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISLAND TERMINALS AND METHO...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISLAND TERMINALS AND EMBED...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND MET...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERMEDIATE PAD AND ME...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFA...