En-Hsing Chen

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory array incorporating mirrored NAND strings and non-shared glo...
- Patent number 7,508,714
- Issue date Mar 24, 2009
- Sandisk 3D LLC
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable memory array structure incorporating series-connected...
- Patent number 7,505,321
- Issue date Mar 17, 2009
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory array incorporating capacitance boosting of channel reg...
- Patent number 7,433,233
- Issue date Oct 7, 2008
- Sandisk 3D LLC
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory array incorporating capacitance boosting of channel reg...
- Patent number 7,233,522
- Issue date Jun 19, 2007
- Sandisk 3D LLC
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array incorporating memory cells arranged in NAND strings
- Patent number 7,221,588
- Issue date May 22, 2007
- Sandisk 3D LLC
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory array incorporating multiple write pulse programming of...
- Patent number 7,023,739
- Issue date Apr 4, 2006
- Matrix Semiconductor, Inc.
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage layer optimization of a nonvolatile memory device
- Patent number 7,012,299
- Issue date Mar 14, 2006
- Matrix Semiconductors, Inc.
- Maitreyee Mahajani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating programmable memory array structures incorpo...
- Patent number 7,005,350
- Issue date Feb 28, 2006
- Matrix Semiconductor, Inc.
- Andrew J. Walker
- G11 - INFORMATION STORAGE
Information Patent Grant
Formation of thin channels for TFT devices to ensure low variabilit...
- Patent number 6,960,794
- Issue date Nov 1, 2005
- Matrix Semiconductor, Inc.
- Andrew J. Walker
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
NAND MEMORY ARRAY INCORPORATING CAPACITANCE BOOSTING OF CHANNEL REG...
- Publication number 20070242511
- Publication date Oct 18, 2007
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY INCORPORATING MEMORY CELLS ARRANGED IN NAND STRINGS
- Publication number 20070217263
- Publication date Sep 20, 2007
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Application
Method of programming a monolithic three-dimensional memory
- Publication number 20060067127
- Publication date Mar 30, 2006
- MATRIX SEMICONDUCTOR, INC.
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Application
Nand memory array incorporating multiple series selection devices a...
- Publication number 20050128807
- Publication date Jun 16, 2005
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
NAND memory array incorporating multiple write pulse programming of...
- Publication number 20050122780
- Publication date Jun 9, 2005
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory array incorporating memory cells arranged in NAND strings
- Publication number 20050122779
- Publication date Jun 9, 2005
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Application
Storage layer optimization of a nonvolatile memory device
- Publication number 20050062098
- Publication date Mar 24, 2005
- MATRIX SEMICONDUCTOR, INC.
- Maitreyee Mahajani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND memory array incorporating capacitance boosting of channel reg...
- Publication number 20040145024
- Publication date Jul 29, 2004
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FABRICATING PROGRAMMABLE MEMORY ARRAY STRUCTURES INCORPO...
- Publication number 20040124466
- Publication date Jul 1, 2004
- Andrew J. Walker
- G11 - INFORMATION STORAGE
Information Patent Application
Formation of thin channels for TFT devices to ensure low variabilit...
- Publication number 20040124415
- Publication date Jul 1, 2004
- Andrew J. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Programmable memory array structure incorporating series-connected...
- Publication number 20040125629
- Publication date Jul 1, 2004
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE

En-Hsing Chen

Person

Patents Grantslast 30 patents

Memory array incorporating mirrored NAND strings and non-shared glo...

Programmable memory array structure incorporating series-connected...

NAND memory array incorporating capacitance boosting of channel reg...

NAND memory array incorporating capacitance boosting of channel reg...

Memory array incorporating memory cells arranged in NAND strings

NAND memory array incorporating multiple write pulse programming of...

Storage layer optimization of a nonvolatile memory device

Method for fabricating programmable memory array structures incorpo...

Formation of thin channels for TFT devices to ensure low variabilit...

Patents Applicationslast 30 patents

NAND MEMORY ARRAY INCORPORATING CAPACITANCE BOOSTING OF CHANNEL REG...

MEMORY ARRAY INCORPORATING MEMORY CELLS ARRANGED IN NAND STRINGS

Method of programming a monolithic three-dimensional memory

Nand memory array incorporating multiple series selection devices a...

NAND memory array incorporating multiple write pulse programming of...

Memory array incorporating memory cells arranged in NAND strings

Storage layer optimization of a nonvolatile memory device

NAND memory array incorporating capacitance boosting of channel reg...

METHOD FOR FABRICATING PROGRAMMABLE MEMORY ARRAY STRUCTURES INCORPO...

Formation of thin channels for TFT devices to ensure low variabilit...

Programmable memory array structure incorporating series-connected...