Eric N. Mann

Person

Issaquah, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
ESD protection circuit
- Patent number 11,876,090
- Issue date Jan 16, 2024
- Cypress Semiconductor Corporation
- David Michael Rogers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable chopping architecture to reduce offset in an analog fr...
- Patent number 11,770,109
- Issue date Sep 26, 2023
- Cypress Semiconductor Corporation
- Erhan Hancioglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
ESD protection circuit
- Patent number 11,521,962
- Issue date Dec 6, 2022
- Cypress Semiconductor Corporation
- David Michael Rogers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Analog to digital converter with floating digital channel configura...
- Patent number 11,496,148
- Issue date Nov 8, 2022
- Cypress Semiconductor Corporation
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable chopping architecture to reduce offset in an analog fr...
- Patent number 11,437,961
- Issue date Sep 6, 2022
- Cypress Semiconductor Corporation
- Erhan Hancioglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for fast detection and automatic gain adjustment in ADC base...
- Patent number 11,251,805
- Issue date Feb 15, 2022
- Cypress Semiconductor Corporation
- Eashwar Thiagarajan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for fast detection and automatic gain adjustment in ADC base...
- Patent number 10,848,170
- Issue date Nov 24, 2020
- Cypress Semiconductor Corporation
- Eashwar Thiagarajan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital-to-analog converter with a sample and hold circuit and a co...
- Patent number 9,692,442
- Issue date Jun 27, 2017
- Cypress Semiconductor Corporation
- Harold M. Kutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual protocol input device
- Patent number 8,711,096
- Issue date Apr 29, 2014
- Cypress Semiconductor Corporation
- Ke-Cai Zeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microcontroller with programmable logic
- Patent number 7,480,165
- Issue date Jan 20, 2009
- Eric N. Mann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current source architecture for memory device standby current reduc...
- Patent number 7,227,804
- Issue date Jun 5, 2007
- Cypress Semiconductor Corporation
- Badrinarayanan Kothandaraman
- G11 - INFORMATION STORAGE
Information Patent Grant
ESD trigger circuit with injected current compensation
- Patent number 7,184,253
- Issue date Feb 27, 2007
- Cypress Semiconductor Corporation
- Marc Hartranft
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fail-safe zero delay buffer with automatic internal reference
- Patent number 6,956,419
- Issue date Oct 18, 2005
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Microcontroller with programmable logic on a single chip
- Patent number 6,898,101
- Issue date May 24, 2005
- Cypress Semiconductor Corp.
- Eric N. Mann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fail-safe zero delay buffer with automatic internal reference
- Patent number 6,768,362
- Issue date Jul 27, 2004
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
SONOS latch and application
- Patent number 6,674,665
- Issue date Jan 6, 2004
- Cypress Semiconductor Corp.
- Eric N. Mann
- G11 - INFORMATION STORAGE
Information Patent Grant
SONOS latch and application
- Patent number 6,532,169
- Issue date Mar 11, 2003
- Cypress Semiconductor Corp.
- Eric N. Mann
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable clock generator
- Patent number 6,433,645
- Issue date Aug 13, 2002
- Cypress Semiconductor Corp.
- Eric N. Mann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable clock generator
- Patent number 6,388,478
- Issue date May 14, 2002
- Cypress Semiconductor Corp.
- Eric N. Mann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock generator with programmable two-tone modulation for EMI reduc...
- Patent number 6,373,306
- Issue date Apr 16, 2002
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Crystal oscillator with frequency trim
- Patent number 6,285,264
- Issue date Sep 4, 2001
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable clock generator
- Patent number 6,188,255
- Issue date Feb 13, 2001
- Cypress Semiconductor Corp.
- Eric N. Mann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock generator with programmable two-tone modulation for EMI reduc...
- Patent number 6,175,259
- Issue date Jan 16, 2001
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Crystal oscillator with eprom-controlled frequency trim
- Patent number 6,104,257
- Issue date Aug 15, 2000
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
One-pin shift register interface
- Patent number 6,088,422
- Issue date Jul 11, 2000
- Cypress Semiconductor Corp.
- Eric N. Mann
- G11 - INFORMATION STORAGE
Information Patent Grant
Low distortion level shifter
- Patent number 5,903,142
- Issue date May 11, 1999
- Cypress Semiconductor Corp.
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cross coupled differential oscillator
- Patent number 5,896,069
- Issue date Apr 20, 1999
- Cypress Semiconductor Corp.
- Bertrand J. Williams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
One-pin shift register interface
- Patent number 5,881,121
- Issue date Mar 9, 1999
- Cypress Semiconductor Corp.
- Eric N. Mann
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable clock generator
- Patent number 5,877,656
- Issue date Mar 2, 1999
- Cypress Semiconductor Corp.
- Eric N. Mann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer for memory modules with trace delay compensation
- Patent number 5,867,448
- Issue date Feb 2, 1999
- Cypress Semiconductor Corp.
- Eric N. Mann
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ESD PROTECTION CIRCUIT
- Publication number 20230343779
- Publication date Oct 26, 2023
- CYPRESS SEMICONDUCTOR CORPORATION
- David Michael Rogers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROGRAMMABLE CHOPPING ARCHITECTURE TO REDUCE OFFSET IN AN ANALOG FR...
- Publication number 20230055860
- Publication date Feb 23, 2023
- CYPRESS SEMICONDUCTOR CORPORATION
- Erhan Hancioglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ANALOG TO DIGITAL CONVERTER WITH FLOATING DIGITAL CHANNEL CONFIGURA...
- Publication number 20220302925
- Publication date Sep 22, 2022
- CYPRESS SEMICONDUCTOR CORPORATION
- Eric N. Mann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR FAST DETECTION AND AUTOMATIC GAIN ADJUSTMENT IN ADC BASE...
- Publication number 20210409034
- Publication date Dec 30, 2021
- CYPRESS SEMICONDUCTOR CORPORATION
- Eashwar Thiagarajan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NOVEL PROGRAMMABLE CHOPPING ARCHITECTURE TO REDUCE OFFSET IN AN ANA...
- Publication number 20210408986
- Publication date Dec 30, 2021
- CYPRESS SEMICONDUCTOR CORPORATION
- Erhan Hancioglu
- H03 - BASIC ELECTRONIC CIRCUITRY

Eric N. Mann

Person

Patents Grantslast 30 patents

ESD protection circuit

Programmable chopping architecture to reduce offset in an analog fr...

ESD protection circuit

Analog to digital converter with floating digital channel configura...

Programmable chopping architecture to reduce offset in an analog fr...

Method for fast detection and automatic gain adjustment in ADC base...

Method for fast detection and automatic gain adjustment in ADC base...

Digital-to-analog converter with a sample and hold circuit and a co...

Dual protocol input device

Microcontroller with programmable logic

Current source architecture for memory device standby current reduc...

ESD trigger circuit with injected current compensation

Fail-safe zero delay buffer with automatic internal reference

Microcontroller with programmable logic on a single chip

Fail-safe zero delay buffer with automatic internal reference

SONOS latch and application

SONOS latch and application

Programmable clock generator

Configurable clock generator

Clock generator with programmable two-tone modulation for EMI reduc...

Crystal oscillator with frequency trim

Configurable clock generator

Clock generator with programmable two-tone modulation for EMI reduc...

Crystal oscillator with eprom-controlled frequency trim

One-pin shift register interface

Low distortion level shifter

Cross coupled differential oscillator

One-pin shift register interface

Programmable clock generator

Buffer for memory modules with trace delay compensation

Patents Applicationslast 30 patents

ESD PROTECTION CIRCUIT

PROGRAMMABLE CHOPPING ARCHITECTURE TO REDUCE OFFSET IN AN ANALOG FR...

ANALOG TO DIGITAL CONVERTER WITH FLOATING DIGITAL CHANNEL CONFIGURA...

METHOD FOR FAST DETECTION AND AUTOMATIC GAIN ADJUSTMENT IN ADC BASE...

NOVEL PROGRAMMABLE CHOPPING ARCHITECTURE TO REDUCE OFFSET IN AN ANA...