Ernest Knoll

Person

Haifa, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Device, system and method to detect clock skew
- Patent number 12,050,483
- Issue date Jul 30, 2024
- Intel Corporation
- Yossi Ben Simon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques in phase-lock loop configuration in a computing device
- Patent number 10,958,278
- Issue date Mar 23, 2021
- Intel Corporation
- Ariel Gur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Changing the clock frequency of a computing device
- Patent number 9,660,799
- Issue date May 23, 2017
- Intel Corporation
- Alexander Gendler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Delay stage with controllably variable capacitive load
- Patent number 7,605,668
- Issue date Oct 20, 2009
- Intel Corporation
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for controlling power management state transit...
- Patent number 7,363,523
- Issue date Apr 22, 2008
- Intel Corporation
- Tsvika Kurts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Startup/yank circuit for self-biased phase-locked loops
- Patent number 7,265,637
- Issue date Sep 4, 2007
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-accuracy continuous duty-cycle correction circuit
- Patent number 7,120,839
- Issue date Oct 10, 2006
- Intel Corporation
- Eyal Fayneh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Yank detection circuit for self-biased phase locked loops
- Patent number 7,095,289
- Issue date Aug 22, 2006
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Startup/yank circuit for self-biased phase-locked loops
- Patent number 6,922,047
- Issue date Jul 26, 2005
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for clock generator lock-time reduction during speedstep tra...
- Patent number 6,914,490
- Issue date Jul 5, 2005
- Ibtel Corporation
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-performance charge pump for self-biased phase-locked loop
- Patent number 6,894,569
- Issue date May 17, 2005
- Intel Corporation
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip filter-regulator, such as one for a microprocessor phase lo...
- Patent number 6,661,213
- Issue date Dec 9, 2003
- Intel Corporation
- Eyal Fayneh
- G05 - CONTROLLING REGULATING
Information Patent Grant
Adaptive integrated PLL loop filter
- Patent number 6,546,059
- Issue date Apr 8, 2003
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency divider
- Patent number 6,393,089
- Issue date May 21, 2002
- Intel Corporation
- Gustavo Maba
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Third-order self-biased phase-locked loop for low jitter applications
- Patent number 6,329,882
- Issue date Dec 11, 2001
- Intel Corporation
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip filter-regulator for a microprocessor phase locked loop supply
- Patent number 6,313,615
- Issue date Nov 6, 2001
- Intel Corporation
- Eyal Fayneh
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and apparatus for selectively disabling clock distribution
- Patent number 6,233,200
- Issue date May 15, 2001
- Intel Corporation
- Ernest Knoll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for locating critical speed paths in integrate...
- Patent number 6,071,003
- Issue date Jun 6, 2000
- Intel Corporation
- Roni Ashuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One-shot clock generator circuit
- Patent number 5,357,204
- Issue date Oct 18, 1994
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CLOCK FREQUENCY RATIO MONITOR
- Publication number 20220091168
- Publication date Mar 24, 2022
- Intel Corporation
- Yossi Ben Simon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE, SYSTEM AND METHOD TO DETECT CLOCK SKEW
- Publication number 20220083093
- Publication date Mar 17, 2022
- Intel Corporation
- Yossi Ben Simon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES IN PHASE-LOCK LOOP CONFIGURATION IN A COMPUTING DEVICE
- Publication number 20210036708
- Publication date Feb 4, 2021
- Intel Corporation
- Ariel Gur
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CHANGING THE CLOCK FREQUENCY OF A COMPUTING DEVICE
- Publication number 20170149554
- Publication date May 25, 2017
- Intel Corporation
- Alexander Gendler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TEMPERATURE COMPENSATED LOOP FILTER
- Publication number 20080157880
- Publication date Jul 3, 2008
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CHARGE PUMP CIRCUIT
- Publication number 20080150596
- Publication date Jun 26, 2008
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY STAGE WITH CONTROLLABLY VARIABLE CAPACITIVE LOAD
- Publication number 20080136545
- Publication date Jun 12, 2008
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Startup/yank circuit for self-biased phase-locked loops
- Publication number 20060244542
- Publication date Nov 2, 2006
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for controlling power management state transit...
- Publication number 20060047986
- Publication date Mar 2, 2006
- Tsvika Kurts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Startup/yank circuit for self-biased phase-locked loops
- Publication number 20050206459
- Publication date Sep 22, 2005
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High-accuracy continuous duty-cycle correction circuit
- Publication number 20050044455
- Publication date Feb 24, 2005
- Intel Corporation
- Eyal Fayneh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for clock generator lock-time reduction during speedstep tra...
- Publication number 20040251970
- Publication date Dec 16, 2004
- Intel Corporation
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Startup/yank circuit for self-biased phase-locked loops
- Publication number 20040239354
- Publication date Dec 2, 2004
- Intel Corporation
- Ernest Knoll
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High-performance charge pump for self-biased phase-locked loop
- Publication number 20040124935
- Publication date Jul 1, 2004
- Eyal Fayneh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
On-chip filter-regulator, such as one for a microprocessor phase lo...
- Publication number 20020030471
- Publication date Mar 14, 2002
- Eyal Fayneh
- G05 - CONTROLLING REGULATING

Ernest Knoll

Person

Patents Grantslast 30 patents

Device, system and method to detect clock skew

Techniques in phase-lock loop configuration in a computing device

Changing the clock frequency of a computing device

Delay stage with controllably variable capacitive load

Method and apparatus for controlling power management state transit...

Startup/yank circuit for self-biased phase-locked loops

High-accuracy continuous duty-cycle correction circuit

Yank detection circuit for self-biased phase locked loops

Startup/yank circuit for self-biased phase-locked loops

Method for clock generator lock-time reduction during speedstep tra...

High-performance charge pump for self-biased phase-locked loop

On-chip filter-regulator, such as one for a microprocessor phase lo...

Adaptive integrated PLL loop filter

Frequency divider

Third-order self-biased phase-locked loop for low jitter applications

On-chip filter-regulator for a microprocessor phase locked loop supply

Method and apparatus for selectively disabling clock distribution

Method and apparatus for locating critical speed paths in integrate...

One-shot clock generator circuit

Patents Applicationslast 30 patents

CLOCK FREQUENCY RATIO MONITOR

DEVICE, SYSTEM AND METHOD TO DETECT CLOCK SKEW

TECHNIQUES IN PHASE-LOCK LOOP CONFIGURATION IN A COMPUTING DEVICE

CHANGING THE CLOCK FREQUENCY OF A COMPUTING DEVICE

TEMPERATURE COMPENSATED LOOP FILTER

CHARGE PUMP CIRCUIT

DELAY STAGE WITH CONTROLLABLY VARIABLE CAPACITIVE LOAD

Startup/yank circuit for self-biased phase-locked loops

Method and apparatus for controlling power management state transit...

Startup/yank circuit for self-biased phase-locked loops

High-accuracy continuous duty-cycle correction circuit

Method for clock generator lock-time reduction during speedstep tra...

Startup/yank circuit for self-biased phase-locked loops

High-performance charge pump for self-biased phase-locked loop

On-chip filter-regulator, such as one for a microprocessor phase lo...