Eyal Naor

Person

Tel Aviv, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Using a shadow copy of a cache in a cache hierarchy
- Patent number 11,907,124
- Issue date Feb 20, 2024
- International Business Machines Corporation
- Yair Fried
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetching data based on register-activity patterns
- Patent number 11,157,281
- Issue date Oct 26, 2021
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store hit multiple load side register for preventing a subsequent s...
- Patent number 11,144,321
- Issue date Oct 12, 2021
- International Business Machines Corporation
- Yair Fried
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing latency of common source data movement instructions
- Patent number 11,029,950
- Issue date Jun 8, 2021
- International Business Machines Corporation
- Yossi Shapira
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heuristic invalidation of non-useful entries in an array
- Patent number 10,977,040
- Issue date Apr 13, 2021
- International Business Machines Corporation
- James Raymond Cuffney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective downstream cache processing for data access
- Patent number 10,970,214
- Issue date Apr 6, 2021
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective downstream cache processing for data access
- Patent number 10,956,328
- Issue date Mar 23, 2021
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Making precise operand-store-compare predictions to avoid false dep...
- Patent number 10,929,142
- Issue date Feb 23, 2021
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing cache latencies using set predictors
- Patent number 10,691,604
- Issue date Jun 23, 2020
- International Business Machines Corporation
- Dwifuzi Coe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing cache latencies using set predictors
- Patent number 10,684,951
- Issue date Jun 16, 2020
- International Business Machines Corporation
- Dwifuzi Coe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing processor instructions using minimal dependency queue
- Patent number 10,678,549
- Issue date Jun 9, 2020
- International Business Machines Corporation
- Avraham Ayzenfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-based data prefetching based on loop-unrolled instructions
- Patent number 10,649,777
- Issue date May 12, 2020
- International Business Machines Corporation
- Yossi Shapira
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modified design debugging using differential trace back
- Patent number 10,572,624
- Issue date Feb 25, 2020
- International Business Machines Corporation
- Erez Barak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective downstream cache processing for data access
- Patent number 10,417,127
- Issue date Sep 17, 2019
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective downstream cache processing for data access
- Patent number 10,409,724
- Issue date Sep 10, 2019
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient pointer load and format
- Patent number 10,360,030
- Issue date Jul 23, 2019
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient pointer load and format
- Patent number 10,353,707
- Issue date Jul 16, 2019
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error checking of a multi-threaded computer processor design under...
- Patent number 10,324,815
- Issue date Jun 18, 2019
- International Business Machines Corporation
- Erez Barak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient pointer load and format
- Patent number 10,169,041
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
USING A SHADOW COPY OF A CACHE IN A CACHE HIERARCHY
- Publication number 20230315631
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Yair Fried
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING LATENCY OF COMMON SOURCE DATA MOVEMENT INSTRUCTIONS
- Publication number 20210004228
- Publication date Jan 7, 2021
- International Business Machines Corporation
- Yossi Shapira
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAKING PRECISE OPERAND-STORE-COMPARE PREDICTIONS TO AVOID FALSE DEP...
- Publication number 20200301710
- Publication date Sep 24, 2020
- International Business Machines Corporation
- Gregory William Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE HIT MULTIPLE LOAD SIDE REGISTER FOR OPERAND STORE COMPARE
- Publication number 20200264885
- Publication date Aug 20, 2020
- International Business Machines Corporation
- Yair Fried
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEURISTIC INVALIDATION OF NON-USEFUL ENTRIES IN AN ARRAY
- Publication number 20200264882
- Publication date Aug 20, 2020
- International Business Machines Corporation
- JAMES RAYMOND CUFFNEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCHING DATA BASED ON REGISTER-ACTIVITY PATTERNS
- Publication number 20190361810
- Publication date Nov 28, 2019
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-BASED DATA PREFETCHING BASED ON LOOP-UNROLLED INSTRUCTIONS
- Publication number 20190347103
- Publication date Nov 14, 2019
- International Business Machines Corporation
- Yossi Shapira
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODIFIED DESIGN DEBUGGING USING DIFFERENTIAL TRACE BACK
- Publication number 20190332741
- Publication date Oct 31, 2019
- International Business Machines Corporation
- EREZ BARAK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTING INSTRUCTIONS BASED ON A SHARED PHYSICAL REGISTER
- Publication number 20190310856
- Publication date Oct 10, 2019
- International Business Machines Corporation
- Avraham Ayzenfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS
- Publication number 20190294544
- Publication date Sep 26, 2019
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS
- Publication number 20190294543
- Publication date Sep 26, 2019
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS
- Publication number 20190213129
- Publication date Jul 11, 2019
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTING PROCESSOR INSTRUCTIONS USING MINIMAL DEPENDENCY QUEUE
- Publication number 20190163481
- Publication date May 30, 2019
- International Business Machines Corporation
- AVRAHAM AYZENFELD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MINIMIZING CACHE LATENCIES USING SET PREDICTORS
- Publication number 20190042468
- Publication date Feb 7, 2019
- International Business Machines Corporation
- Dwifuzi COE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MINIMIZING CACHE LATENCIES USING SET PREDICTORS
- Publication number 20190042469
- Publication date Feb 7, 2019
- International Business Machines Corporation
- Dwifuzi COE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS
- Publication number 20190018773
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS
- Publication number 20190018772
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Willm Hinrichs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT POINTER LOAD AND FORMAT
- Publication number 20190018682
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT POINTER LOAD AND FORMAT
- Publication number 20190018683
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT POINTER LOAD AND FORMAT
- Publication number 20190018681
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Eyal Naor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CHECKING OF A MULTI-THREADED COMPUTER PROCESSOR DESIGN UNDER...
- Publication number 20180232292
- Publication date Aug 16, 2018
- International Business Machines Corporation
- Erez Barak
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Using a shadow copy of a cache in a cache hierarchy

Prefetching data based on register-activity patterns

Store hit multiple load side register for preventing a subsequent s...

Reducing latency of common source data movement instructions

Heuristic invalidation of non-useful entries in an array

Selective downstream cache processing for data access

Selective downstream cache processing for data access

Making precise operand-store-compare predictions to avoid false dep...

Minimizing cache latencies using set predictors

Minimizing cache latencies using set predictors

Executing processor instructions using minimal dependency queue

Hardware-based data prefetching based on loop-unrolled instructions

Modified design debugging using differential trace back

Selective downstream cache processing for data access

Selective downstream cache processing for data access

Efficient pointer load and format

Efficient pointer load and format

Error checking of a multi-threaded computer processor design under...

Efficient pointer load and format

Patents Applicationslast 30 patents

USING A SHADOW COPY OF A CACHE IN A CACHE HIERARCHY

REDUCING LATENCY OF COMMON SOURCE DATA MOVEMENT INSTRUCTIONS

MAKING PRECISE OPERAND-STORE-COMPARE PREDICTIONS TO AVOID FALSE DEP...

STORE HIT MULTIPLE LOAD SIDE REGISTER FOR OPERAND STORE COMPARE

HEURISTIC INVALIDATION OF NON-USEFUL ENTRIES IN AN ARRAY

PREFETCHING DATA BASED ON REGISTER-ACTIVITY PATTERNS

HARDWARE-BASED DATA PREFETCHING BASED ON LOOP-UNROLLED INSTRUCTIONS

MODIFIED DESIGN DEBUGGING USING DIFFERENTIAL TRACE BACK

EXECUTING INSTRUCTIONS BASED ON A SHARED PHYSICAL REGISTER

SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS

SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS

SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS

EXECUTING PROCESSOR INSTRUCTIONS USING MINIMAL DEPENDENCY QUEUE

MINIMIZING CACHE LATENCIES USING SET PREDICTORS

MINIMIZING CACHE LATENCIES USING SET PREDICTORS

SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS

SELECTIVE DOWNSTREAM CACHE PROCESSING FOR DATA ACCESS

EFFICIENT POINTER LOAD AND FORMAT

EFFICIENT POINTER LOAD AND FORMAT

EFFICIENT POINTER LOAD AND FORMAT

ERROR CHECKING OF A MULTI-THREADED COMPUTER PROCESSOR DESIGN UNDER...