Farid Nemati

Person

Redwood City, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory error tracking and logging
- Patent number 11,934,265
- Issue date Mar 19, 2024
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data corruption tracking for memory reliability
- Patent number 11,829,242
- Issue date Nov 28, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having combined high density, low bandwidth and low d...
- Patent number 11,830,534
- Issue date Nov 28, 2023
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system having combined high density, low bandwidth and low d...
- Patent number 11,468,935
- Issue date Oct 11, 2022
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Grant
Storing address of spare in failed memory location
- Patent number 10,929,222
- Issue date Feb 23, 2021
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having combined high density, low bandwidth and low d...
- Patent number 10,916,290
- Issue date Feb 9, 2021
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Grant
Gated bipolar junction transistors, memory arrays, and methods of f...
- Patent number 10,886,273
- Issue date Jan 5, 2021
- Micron Technology, Inc.
- Rajesh N. Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory system having combined high density, low bandwidth and low d...
- Patent number 10,573,368
- Issue date Feb 25, 2020
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Grant
Gated bipolar junction transistors, memory arrays, and methods of f...
- Patent number 10,373,956
- Issue date Aug 6, 2019
- Micron Technology, Inc.
- Rajesh N. Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Storing address of spare in failed memory location
- Patent number 10,318,377
- Issue date Jun 11, 2019
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storing address of spare in failed memory location
- Patent number 10,042,701
- Issue date Aug 7, 2018
- Apple Inc.
- Manu Gulati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristors, methods of programming thyristors, and methods of formi...
- Patent number 9,691,465
- Issue date Jun 27, 2017
- Micron Technology, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells having a common gate terminal
- Patent number 9,520,447
- Issue date Dec 13, 2016
- Micron Technology, Inc.
- Rajesh N. Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristors
- Patent number 9,361,966
- Issue date Jun 7, 2016
- Micron Technology, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells having a common gate terminal
- Patent number 9,082,494
- Issue date Jul 14, 2015
- Micron Technology, Inc.
- Rajesh N. Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Gated bipolar junction transistors
- Patent number 8,952,418
- Issue date Feb 10, 2015
- Micron Technology, Inc.
- Rajesh N. Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sense amplifiers and operations thereof
- Patent number 8,576,649
- Issue date Nov 5, 2013
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid memory cell array and operations thereof
- Patent number 8,576,607
- Issue date Nov 5, 2013
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristors
- Patent number 8,519,431
- Issue date Aug 27, 2013
- Micron Technology, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Tracking for read and inverse write back of a group of thyristor-ba...
- Patent number 8,441,881
- Issue date May 14, 2013
- T-RAM Semiconductor
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristor semiconductor memory and method of manufacture
- Patent number 8,093,107
- Issue date Jan 10, 2012
- T-RAM Semiconductor, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristor-based memory array having lines with standby voltages
- Patent number 7,969,777
- Issue date Jun 28, 2011
- T-RAM Semiconductor, Inc.
- Hyun-Jin Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic data restore in thyristor-based memory device
- Patent number 7,961,540
- Issue date Jun 14, 2011
- T-RAM Semiconductor, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristor based memory cell
- Patent number 7,894,255
- Issue date Feb 22, 2011
- T-RAM Semiconductor, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristor-based memory and its method of operation
- Patent number 7,893,456
- Issue date Feb 22, 2011
- T-RAM Semiconductor, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristor based memory cell
- Patent number 7,894,256
- Issue date Feb 22, 2011
- T-RAM Semiconductor, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Thyristor device with carbon lifetime adjustment implant and its me...
- Patent number 7,858,449
- Issue date Dec 28, 2010
- T-RAM Semiconductor, Inc.
- Kevin J. Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
High ion/Ioff SOI MOSFET using body voltage control
- Patent number 7,859,011
- Issue date Dec 28, 2010
- T-RAM Semiconductor, Inc.
- Zachary K. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Content-addressable memory architecture
- Patent number 7,738,274
- Issue date Jun 15, 2010
- T-RAM Semiconductor, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with leakage implant and method of fabrication
- Patent number 7,491,586
- Issue date Feb 17, 2009
- T-RAM Semiconductor, Inc.
- Andrew E Horch
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory Error Tracking and Logging
- Publication number 20240427663
- Publication date Dec 26, 2024
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System Having Combined High Density, Low Bandwidth and Low D...
- Publication number 20240161804
- Publication date May 16, 2024
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Application
Decoding Status Flag Techniques for Memory Circuits
- Publication number 20230325274
- Publication date Oct 12, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Error Tracking and Logging
- Publication number 20230305924
- Publication date Sep 28, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Corruption Tracking for Memory Reliability
- Publication number 20230251930
- Publication date Aug 10, 2023
- Apple Inc.
- Farid Nemati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System Having Combined High Density, Low Bandwidth and Low D...
- Publication number 20220415379
- Publication date Dec 29, 2022
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Application
Memory System Having Combined High Density, Low Bandwidth and Low D...
- Publication number 20210125657
- Publication date Apr 29, 2021
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Application
Memory System Having Combined High Density, Low Bandwidth and Low D...
- Publication number 20200143866
- Publication date May 7, 2020
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Application
Gated Bipolar Junction Transistors, Memory Arrays, and Methods of F...
- Publication number 20190296016
- Publication date Sep 26, 2019
- Micron Technology, Inc.
- Rajesh N. Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Storing Address of Spare in Failed Memory Location
- Publication number 20190286519
- Publication date Sep 19, 2019
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System Having Combined High Density, Low Bandwidth and Low D...
- Publication number 20190198083
- Publication date Jun 27, 2019
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Application
Storing Address of Spare in Failed Memory Location
- Publication number 20180314592
- Publication date Nov 1, 2018
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storing Address of Spare in Failed Memory Location
- Publication number 20170091026
- Publication date Mar 30, 2017
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Thyristors, Methods of Programming Thyristors, and Methods of Formi...
- Publication number 20160078917
- Publication date Mar 17, 2016
- Micron Technology, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELLS HAVING A COMMON GATE TERMINAL
- Publication number 20150311254
- Publication date Oct 29, 2015
- Micron Technology, Inc.
- Rajesh N. Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Gated Bipolar Junction Transistors, Memory Arrays, and Methods of F...
- Publication number 20150155283
- Publication date Jun 4, 2015
- Micron Technology, Inc.
- Rajesh N. Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thyristors
- Publication number 20130314986
- Publication date Nov 28, 2013
- Micron Technology, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELLS HAVING A COMMON GATE TERMINAL
- Publication number 20130182486
- Publication date Jul 18, 2013
- Micron Technology, Inc.
- Rajesh N. Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Thyristors, Methods of Programming Thyristors, and Methods of Formi...
- Publication number 20120228629
- Publication date Sep 13, 2012
- Micron Technology, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Application
Gated Bipolar Junction Transistors, Memory Arrays, and Methods of F...
- Publication number 20120223369
- Publication date Sep 6, 2012
- Micron Technology, Inc.
- Rajesh N. Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DYNAMIC DATA RESTORE IN THYRISTOR-BASED MEMORY DEVICE
- Publication number 20100315871
- Publication date Dec 16, 2010
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Application
THYRISTOR DEVICE WITH CARBON LIFETIME ADJUSTMENT IMPLANT AND ITS ME...
- Publication number 20090162979
- Publication date Jun 25, 2009
- Kevin J. Yang
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH ION/IOFF SOI MOSFET USING BODY VOLTAGE CONTROL
- Publication number 20090140288
- Publication date Jun 4, 2009
- Zachary K. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dynamic data restore in thyristor-based memory device
- Publication number 20060139996
- Publication date Jun 29, 2006
- T-RAM, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device with leakage implant and method of fabrication
- Publication number 20050233506
- Publication date Oct 20, 2005
- T-RAM Semiconductor, Inc.
- Andrew E. Horch
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic data restore in thyristor-based memory device
- Publication number 20050185489
- Publication date Aug 25, 2005
- T-RAM, Inc.
- Farid Nemati
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic data restore in thyristor-based memory device
- Publication number 20040104400
- Publication date Jun 3, 2004
- Nemati Farid
- G11 - INFORMATION STORAGE

Farid Nemati

Person

Patents Grantslast 30 patents

Memory error tracking and logging

Data corruption tracking for memory reliability

Memory system having combined high density, low bandwidth and low d...

Memory system having combined high density, low bandwidth and low d...

Storing address of spare in failed memory location

Memory system having combined high density, low bandwidth and low d...

Gated bipolar junction transistors, memory arrays, and methods of f...

Memory system having combined high density, low bandwidth and low d...

Gated bipolar junction transistors, memory arrays, and methods of f...

Storing address of spare in failed memory location

Storing address of spare in failed memory location

Thyristors, methods of programming thyristors, and methods of formi...

Memory cells having a common gate terminal

Thyristors

Memory cells having a common gate terminal

Gated bipolar junction transistors

Sense amplifiers and operations thereof

Hybrid memory cell array and operations thereof

Thyristors

Tracking for read and inverse write back of a group of thyristor-ba...

Thyristor semiconductor memory and method of manufacture

Thyristor-based memory array having lines with standby voltages

Dynamic data restore in thyristor-based memory device

Thyristor based memory cell

Thyristor-based memory and its method of operation

Thyristor based memory cell

Thyristor device with carbon lifetime adjustment implant and its me...

High ion/Ioff SOI MOSFET using body voltage control

Content-addressable memory architecture

Semiconductor device with leakage implant and method of fabrication

Patents Applicationslast 30 patents

Memory Error Tracking and Logging

Memory System Having Combined High Density, Low Bandwidth and Low D...

Decoding Status Flag Techniques for Memory Circuits

Memory Error Tracking and Logging

Data Corruption Tracking for Memory Reliability

Memory System Having Combined High Density, Low Bandwidth and Low D...

Memory System Having Combined High Density, Low Bandwidth and Low D...

Memory System Having Combined High Density, Low Bandwidth and Low D...

Gated Bipolar Junction Transistors, Memory Arrays, and Methods of F...

Storing Address of Spare in Failed Memory Location

Memory System Having Combined High Density, Low Bandwidth and Low D...

Storing Address of Spare in Failed Memory Location

Storing Address of Spare in Failed Memory Location

Thyristors, Methods of Programming Thyristors, and Methods of Formi...

MEMORY CELLS HAVING A COMMON GATE TERMINAL

Gated Bipolar Junction Transistors, Memory Arrays, and Methods of F...

Thyristors

MEMORY CELLS HAVING A COMMON GATE TERMINAL

Thyristors, Methods of Programming Thyristors, and Methods of Formi...

Gated Bipolar Junction Transistors, Memory Arrays, and Methods of F...

DYNAMIC DATA RESTORE IN THYRISTOR-BASED MEMORY DEVICE

THYRISTOR DEVICE WITH CARBON LIFETIME ADJUSTMENT IMPLANT AND ITS ME...

HIGH ION/IOFF SOI MOSFET USING BODY VOLTAGE CONTROL

Dynamic data restore in thyristor-based memory device

Semiconductor device with leakage implant and method of fabrication

Dynamic data restore in thyristor-based memory device

Dynamic data restore in thyristor-based memory device