Fernando Latorre

Person

Barcelona, ES

People

Patents Grantslast 30 patents

Information Patent Grant
Reconfigurable processing unit
- Patent number 11,281,965
- Issue date Mar 22, 2022
- Intel Corporation
- Marc Lupon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device for performing convolution operations
- Patent number 10,402,468
- Issue date Sep 3, 2019
- Intel Corporation
- Enric Herrero Abellanas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for optimization level aware branch prediction
- Patent number 10,157,063
- Issue date Dec 18, 2018
- Intel Corporation
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for bulk register reclamation
- Patent number 10,061,587
- Issue date Aug 28, 2018
- Intel Corporation
- David Pardo Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Propagating a prefetching profile bit from a prefetch queue to a da...
- Patent number 10,013,326
- Issue date Jul 3, 2018
- Intel Corporation
- Raul Martinez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device for performing convolution operations
- Patent number 10,002,108
- Issue date Jun 19, 2018
- Intel Corporation
- Enric Herrero Abellanas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable processing unit
- Patent number 9,978,014
- Issue date May 22, 2018
- Intel Corporation
- Marc Lupon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Utilization of register checkpointing mechanism with pointer swappi...
- Patent number 9,940,138
- Issue date Apr 10, 2018
- Intel Corporation
- Pedro Lopez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managed instruction cache prefetching
- Patent number 9,811,341
- Issue date Nov 7, 2017
- Intel Corporation
- Kyriakos A. Stavrou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device for performing convolution operations
- Patent number 9,613,001
- Issue date Apr 4, 2017
- Intel Corporation
- Enric Herrero Abellanas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for support of code modification in translati...
- Patent number 9,582,432
- Issue date Feb 28, 2017
- Intel Corporation
- Jaroslaw Topp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-level cache locking mechanism
- Patent number 9,558,121
- Issue date Jan 31, 2017
- Intel Corporation
- Li-Gao Zei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store forwarding for data caches
- Patent number 9,507,725
- Issue date Nov 29, 2016
- Intel Corporation
- Steffen Kosinski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for support of code modification in translati...
- Patent number 9,367,477
- Issue date Jun 14, 2016
- Intel Corporation
- Jaroslaw Topp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive data prefetching
- Patent number 9,280,474
- Issue date Mar 8, 2016
- Intel Corporation
- Demos Pavlou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherency and processor consistency
- Patent number 9,195,465
- Issue date Nov 24, 2015
- Intel Corporation
- Varun K. Mohandru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stride-based translation lookaside buffer (TLB) prefetching with ad...
- Patent number 9,158,705
- Issue date Oct 13, 2015
- Intel Corporation
- Jaroslaw Topp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to implement lazy flush in a virtually tagged...
- Patent number 9,009,413
- Issue date Apr 14, 2015
- Intel Corporation
- Varun K. Mohandru
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, methods, and apparatuses to decompose a sequential program...
- Patent number 8,909,902
- Issue date Dec 9, 2014
- Intel Corporation
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replacement policy for hot code detection
- Patent number 8,612,698
- Issue date Dec 17, 2013
- Intel Corporation
- Pedro Lopez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded clustered microarchitecture with dynamic back-end ass...
- Patent number 8,423,716
- Issue date Apr 16, 2013
- Intel Corporation
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access of register files of other threads using synchronization
- Patent number 8,261,046
- Issue date Sep 4, 2012
- Intel Corporation
- Enric Gibert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Achieving coherence between dynamically optimized code and original...
- Patent number 8,190,652
- Issue date May 29, 2012
- Intel Corporation
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling speculative state information in a cache coherency protocol
- Patent number 8,185,700
- Issue date May 22, 2012
- Intel Corporation
- Carlos Madriles Gimeno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded clustered microarchitecture with dynamic back-end ass...
- Patent number 7,996,617
- Issue date Aug 9, 2011
- Intel Corporation
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache sharing based thread control
- Patent number 7,895,415
- Issue date Feb 22, 2011
- Intel Corporation
- Antonio Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded clustered microarchitecture with dynamic back-end ass...
- Patent number 7,478,198
- Issue date Jan 13, 2009
- Intel Corporation
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register allocation technique
- Patent number 7,313,675
- Issue date Dec 25, 2007
- Intel Corporation
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
RECONFIGURABLE PROCESSING UNIT
- Publication number 20180349763
- Publication date Dec 6, 2018
- Intel Corporation
- Marc Lupon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING DEVICE FOR PERFORMING CONVOLUTION OPERATIONS
- Publication number 20180329867
- Publication date Nov 15, 2018
- Intel Corporation
- Enric Herrero Abellanas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING DEVICE FOR PERFORMING CONVOLUTION OPERATIONS
- Publication number 20170220524
- Publication date Aug 3, 2017
- Intel Corporation
- Enric Herrero Abellanas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Support of Code Modification In Translati...
- Publication number 20160292081
- Publication date Oct 6, 2016
- Intel Corporation
- Jaroslaw Topp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems, Methods, and Apparatuses to Decompose a Sequential Program...
- Publication number 20160162406
- Publication date Jun 9, 2016
- FERNANDO LATORRE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR BULK REGISTER RECLAMATION
- Publication number 20160092222
- Publication date Mar 31, 2016
- Intel Corporation
- David Pardo Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR SUPPORT OF CODE MODIFICATION IN TRANSLATI...
- Publication number 20160085685
- Publication date Mar 24, 2016
- Intel Corporation
- Jaroslaw Topp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEIGHT-SHIFTING MECHANISM FOR CONVOLUTIONAL NEURAL NETWORKS
- Publication number 20160026912
- Publication date Jan 28, 2016
- Intel Corporation
- Ayose J. Falcon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING DEVICE FOR PERFORMING CONVOLUTION OPERATIONS
- Publication number 20150178246
- Publication date Jun 25, 2015
- Enric Herrero Abellanas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE PROCESSING UNIT
- Publication number 20150170021
- Publication date Jun 18, 2015
- Marc Lupon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE DATA PREFETCHING
- Publication number 20150143057
- Publication date May 21, 2015
- Intel Corporation
- Demos Pavlou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRIDE-BASED TRANSLATION LOOKASIDE BUFFER (TLB) PREFETCHING WITH AD...
- Publication number 20140281351
- Publication date Sep 18, 2014
- Jaroslaw Topp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Two-Level Cache Locking Mechanism
- Publication number 20140189238
- Publication date Jul 3, 2014
- Li-Gao ZEI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Store Forwarding for Data Caches
- Publication number 20140189250
- Publication date Jul 3, 2014
- Steffen Kosinski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCY AND PROCESSOR CONSISTENCY
- Publication number 20140189253
- Publication date Jul 3, 2014
- Varun K. MOHANDRU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus To Implement Lazy Flush In A Virtually Tagged...
- Publication number 20140181388
- Publication date Jun 26, 2014
- Varun K. Mohandru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS AND SYSTEM FOR SELECTIVE EXECUTION OF A COMMIT IN...
- Publication number 20140156976
- Publication date Jun 5, 2014
- Enric Gibert Codina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Branch Prediction Gating
- Publication number 20140143526
- Publication date May 22, 2014
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR OPTIMIZATION LEVEL AWARE BRANCH PREDICTION
- Publication number 20140095849
- Publication date Apr 3, 2014
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGED INSTRUCTION CACHE PREFETCHING
- Publication number 20140019721
- Publication date Jan 16, 2014
- Kyriakos A. Stavrou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROFILING ASYNCHRONOUS EVENTS RESULTING FROM THE EXECUTION OF SOFTW...
- Publication number 20130332705
- Publication date Dec 12, 2013
- Raul Martinez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CONTROLLING A MXCSR
- Publication number 20130326199
- Publication date Dec 5, 2013
- Grigorios Magklis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORT FOR SPECULATIVE OWNERSHIP WITHOUT DATA
- Publication number 20130268735
- Publication date Oct 10, 2013
- Enric Gibert Codina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Branch Predictor with Jump Ahead Logic to Jump Over Portions of Pro...
- Publication number 20120311308
- Publication date Dec 6, 2012
- Polychronis Xekalakis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTITHREADED CLUSTERED MICROARCHITECTURE WITH DYNAMIC BACK-END ASS...
- Publication number 20110271056
- Publication date Nov 3, 2011
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES TO DECOMPOSE A SEQUENTIAL PROGRAM...
- Publication number 20100269102
- Publication date Oct 21, 2010
- Fernando Latorre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER CHECKPOINTING MECHANISM FOR MULTITHREADING
- Publication number 20100262812
- Publication date Oct 14, 2010
- Pedro Lopez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPLACEMENT POLICY FOR HOT CODE DETECTION
- Publication number 20100115247
- Publication date May 6, 2010
- Pedro Lopez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communicating Between Multiple Threads In A Processor
- Publication number 20100005277
- Publication date Jan 7, 2010
- Enric Gibert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISMS TO HANDLE FREE PHYSICAL REGISTER IDENTIFIERS FOR SMT OUT...
- Publication number 20090327661
- Publication date Dec 31, 2009
- Zeev Sperber
- G06 - COMPUTING CALCULATING COUNTING

Fernando Latorre

Person

Patents Grantslast 30 patents

Reconfigurable processing unit

Processing device for performing convolution operations

Instruction and logic for optimization level aware branch prediction

Instruction and logic for bulk register reclamation

Propagating a prefetching profile bit from a prefetch queue to a da...

Processing device for performing convolution operations

Reconfigurable processing unit

Utilization of register checkpointing mechanism with pointer swappi...

Managed instruction cache prefetching

Processing device for performing convolution operations

Instruction and logic for support of code modification in translati...

Two-level cache locking mechanism

Store forwarding for data caches

Instruction and logic for support of code modification in translati...

Adaptive data prefetching

Cache coherency and processor consistency

Stride-based translation lookaside buffer (TLB) prefetching with ad...

Method and apparatus to implement lazy flush in a virtually tagged...

Systems, methods, and apparatuses to decompose a sequential program...

Replacement policy for hot code detection

Multithreaded clustered microarchitecture with dynamic back-end ass...

Access of register files of other threads using synchronization

Achieving coherence between dynamically optimized code and original...

Enabling speculative state information in a cache coherency protocol

Multithreaded clustered microarchitecture with dynamic back-end ass...

Cache sharing based thread control

Multithreaded clustered microarchitecture with dynamic back-end ass...

Register allocation technique

Patents Applicationslast 30 patents

RECONFIGURABLE PROCESSING UNIT

PROCESSING DEVICE FOR PERFORMING CONVOLUTION OPERATIONS

PROCESSING DEVICE FOR PERFORMING CONVOLUTION OPERATIONS

Instruction and Logic for Support of Code Modification In Translati...

Systems, Methods, and Apparatuses to Decompose a Sequential Program...

INSTRUCTION AND LOGIC FOR BULK REGISTER RECLAMATION

INSTRUCTION AND LOGIC FOR SUPPORT OF CODE MODIFICATION IN TRANSLATI...

WEIGHT-SHIFTING MECHANISM FOR CONVOLUTIONAL NEURAL NETWORKS

PROCESSING DEVICE FOR PERFORMING CONVOLUTION OPERATIONS

RECONFIGURABLE PROCESSING UNIT

ADAPTIVE DATA PREFETCHING

STRIDE-BASED TRANSLATION LOOKASIDE BUFFER (TLB) PREFETCHING WITH AD...

Two-Level Cache Locking Mechanism

Store Forwarding for Data Caches

CACHE COHERENCY AND PROCESSOR CONSISTENCY

Method And Apparatus To Implement Lazy Flush In A Virtually Tagged...

METHOD, APPARATUS AND SYSTEM FOR SELECTIVE EXECUTION OF A COMMIT IN...

Branch Prediction Gating

INSTRUCTION AND LOGIC FOR OPTIMIZATION LEVEL AWARE BRANCH PREDICTION

MANAGED INSTRUCTION CACHE PREFETCHING

PROFILING ASYNCHRONOUS EVENTS RESULTING FROM THE EXECUTION OF SOFTW...

METHOD AND APPARATUS FOR CONTROLLING A MXCSR

SUPPORT FOR SPECULATIVE OWNERSHIP WITHOUT DATA

Branch Predictor with Jump Ahead Logic to Jump Over Portions of Pro...

MULTITHREADED CLUSTERED MICROARCHITECTURE WITH DYNAMIC BACK-END ASS...

SYSTEMS, METHODS, AND APPARATUSES TO DECOMPOSE A SEQUENTIAL PROGRAM...

REGISTER CHECKPOINTING MECHANISM FOR MULTITHREADING

REPLACEMENT POLICY FOR HOT CODE DETECTION

Communicating Between Multiple Threads In A Processor

MECHANISMS TO HANDLE FREE PHYSICAL REGISTER IDENTIFIERS FOR SMT OUT...