Frank Worrell

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for configuring a front end to process multip...
- Patent number 11,729,640
- Issue date Aug 15, 2023
- Marvell Asia Pte, Ltd.
- Mehran Nekuii
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for configuring a front end to process multip...
- Patent number 11,172,379
- Issue date Nov 9, 2021
- Marvell Asia Pte, Ltd.
- Mehran Nekuii
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Distributed timer subsystem
- Patent number 9,928,193
- Issue date Mar 27, 2018
- Cavium, Inc.
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Condition code approach for comparing rule and packet data that are...
- Patent number 9,667,446
- Issue date May 30, 2017
- Cavium, Inc.
- Frank Worrell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Distributed timer subsystem across multiple devices
- Patent number 9,568,944
- Issue date Feb 14, 2017
- Cavium, Inc.
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-rule approach to encoding a group of rules
- Patent number 9,544,402
- Issue date Jan 10, 2017
- Cavium, Inc.
- Frank Worrell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems for implementing SDRAM controllers, and buses adapted to in...
- Patent number 8,046,505
- Issue date Oct 25, 2011
- LSI Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems for implementing SDRAM controllers, and buses adapted to in...
- Patent number 7,966,431
- Issue date Jun 21, 2011
- LSI Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems for implementing SDRAM controllers, and buses adapted to in...
- Patent number 7,797,467
- Issue date Sep 14, 2010
- LSI Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo pipeline and pseudo pipelined SDRAM controller
- Patent number 7,681,017
- Issue date Mar 16, 2010
- LSI Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip bus
- Patent number 7,069,363
- Issue date Jun 27, 2006
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor pipeline stall based on data register status
- Patent number 6,973,561
- Issue date Dec 6, 2005
- LSI Logic Corporation
- Rene Vangemert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simple branch prediction and misprediction recovery method
- Patent number 6,948,054
- Issue date Sep 20, 2005
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Central processing unit including address generation system and ins...
- Patent number 6,877,082
- Issue date Apr 5, 2005
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simple mechanism for guaranteeing in order read data return on a sp...
- Patent number 6,728,816
- Issue date Apr 27, 2004
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data cache store buffer
- Patent number 6,671,781
- Issue date Dec 30, 2003
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data-cache data-path
- Patent number 6,584,537
- Issue date Jun 24, 2003
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor employing branch instruction to set compression mode
- Patent number 6,412,066
- Issue date Jun 25, 2002
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically variable length CPU pipeline for efficiently executing...
- Patent number 6,012,138
- Issue date Jan 4, 2000
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic and logic function circuits optimized for datapath layout
- Patent number 5,982,194
- Issue date Nov 9, 1999
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface for a modularized computational unit to a CPU
- Patent number 5,931,941
- Issue date Aug 3, 1999
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor adapted for executing both a non-compressed fixed le...
- Patent number 5,905,893
- Issue date May 18, 1999
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for detecting instructions from a variable-length compres...
- Patent number 5,896,519
- Issue date Apr 20, 1999
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor having register dependent immediate decompression
- Patent number 5,867,681
- Issue date Feb 2, 1999
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for allowing execution of both compressed inst...
- Patent number 5,794,010
- Issue date Aug 11, 1998
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined CPU with instruction fetch, execution and write back stages
- Patent number 5,784,634
- Issue date Jul 21, 1998
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced branch delay slot handling with single exception program c...
- Patent number 5,774,709
- Issue date Jun 30, 1998
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor shifter using rotation and masking operations
- Patent number 5,729,482
- Issue date Mar 17, 1998
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mask decoder circuit optimized for data path
- Patent number 5,670,900
- Issue date Sep 23, 1997
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan compatible 3-state bus control
- Patent number 5,648,733
- Issue date Jul 15, 1997
- LSI Logic Corporation
- Frank Worrell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR CONFIGURING A FRONT END TO PROCESS MULTIP...
- Publication number 20220060912
- Publication date Feb 24, 2022
- Marvell Asia Pte Ltd.
- Mehran Nekuii
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Methods and Apparatus for Configuring a Front End to Process Multip...
- Publication number 20170195900
- Publication date Jul 6, 2017
- Cavium, Inc.
- Mehran Nekuii
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DISTRIBUTED TIMER SUBSYSTEM
- Publication number 20160140066
- Publication date May 19, 2016
- Cavium, Inc.
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED TIMER SUBSYSTEM ACROSS MULTIPLE DEVICES
- Publication number 20160139625
- Publication date May 19, 2016
- Cavium, Inc.
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONDITION CODE APPROACH FOR COMPARING RULE AND KEY DATA THAT ARE PR...
- Publication number 20150193689
- Publication date Jul 9, 2015
- Cavium, Inc.
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-RULE APPROACH TO ENCODING A GROUP OF RULES
- Publication number 20150189046
- Publication date Jul 2, 2015
- Cavium, Inc.
- Frank Worrell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS FOR IMPLEMENTING SDRAM CONTROLLERS, AND BUSES ADAPTED TO IN...
- Publication number 20100325319
- Publication date Dec 23, 2010
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS FOR IMPLEMENTING SDRAM CONTROLLERS, AND BUSES ADAPTED TO IN...
- Publication number 20100321972
- Publication date Dec 23, 2010
- LSI CORPORATION
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems for implementing SDRAM controllers, and buses adapted to in...
- Publication number 20070136503
- Publication date Jun 14, 2007
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pseudo pipeline and pseudo pipelined SDRAM controller
- Publication number 20070101089
- Publication date May 3, 2007
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Branch predictor for a processor and method of predicting a conditi...
- Publication number 20070061554
- Publication date Mar 15, 2007
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data-cache data-path
- Publication number 20030191896
- Publication date Oct 9, 2003
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simple branch prediction and misprediction recovery method
- Publication number 20020066006
- Publication date May 30, 2002
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor employing branch instruction to set compression mode
- Publication number 20010029577
- Publication date Oct 11, 2001
- LSI Logic Corporation
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor including a mode detector for setting compression mode
- Publication number 20010025337
- Publication date Sep 27, 2001
- Frank Worrell
- G06 - COMPUTING CALCULATING COUNTING

Frank Worrell

Person

Patents Grantslast 30 patents

Methods and apparatus for configuring a front end to process multip...

Methods and apparatus for configuring a front end to process multip...

Distributed timer subsystem

Condition code approach for comparing rule and packet data that are...

Distributed timer subsystem across multiple devices

Multi-rule approach to encoding a group of rules

Systems for implementing SDRAM controllers, and buses adapted to in...

Systems for implementing SDRAM controllers, and buses adapted to in...

Systems for implementing SDRAM controllers, and buses adapted to in...

Pseudo pipeline and pseudo pipelined SDRAM controller

On-chip bus

Processor pipeline stall based on data register status

Simple branch prediction and misprediction recovery method

Central processing unit including address generation system and ins...

Simple mechanism for guaranteeing in order read data return on a sp...

Data cache store buffer

Data-cache data-path

Microprocessor employing branch instruction to set compression mode

Dynamically variable length CPU pipeline for efficiently executing...

Arithmetic and logic function circuits optimized for datapath layout

Interface for a modularized computational unit to a CPU

Microprocessor adapted for executing both a non-compressed fixed le...

Apparatus for detecting instructions from a variable-length compres...

Microprocessor having register dependent immediate decompression

Method and apparatus for allowing execution of both compressed inst...

Pipelined CPU with instruction fetch, execution and write back stages

Enhanced branch delay slot handling with single exception program c...

Microprocessor shifter using rotation and masking operations

Mask decoder circuit optimized for data path

Scan compatible 3-state bus control

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR CONFIGURING A FRONT END TO PROCESS MULTIP...

Methods and Apparatus for Configuring a Front End to Process Multip...

DISTRIBUTED TIMER SUBSYSTEM

DISTRIBUTED TIMER SUBSYSTEM ACROSS MULTIPLE DEVICES

CONDITION CODE APPROACH FOR COMPARING RULE AND KEY DATA THAT ARE PR...

MULTI-RULE APPROACH TO ENCODING A GROUP OF RULES

SYSTEMS FOR IMPLEMENTING SDRAM CONTROLLERS, AND BUSES ADAPTED TO IN...

SYSTEMS FOR IMPLEMENTING SDRAM CONTROLLERS, AND BUSES ADAPTED TO IN...

Systems for implementing SDRAM controllers, and buses adapted to in...

Pseudo pipeline and pseudo pipelined SDRAM controller

Branch predictor for a processor and method of predicting a conditi...

Data-cache data-path

Simple branch prediction and misprediction recovery method

Microprocessor employing branch instruction to set compression mode

Microprocessor including a mode detector for setting compression mode