Gabriel Quan

Person

Toronto, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for performing fast incremental physical desig...
- Patent number 11,093,672
- Issue date Aug 17, 2021
- Altera Corporation
- Junaid Asim Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing fast incremental physical desig...
- Patent number 10,635,772
- Issue date Apr 28, 2020
- Altera Corporation
- Junaid Asim Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 9,754,065
- Issue date Sep 5, 2017
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing fast incremental physical desig...
- Patent number 9,569,574
- Issue date Feb 14, 2017
- Altera Corporation
- Junaid Asim Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing compilation using multiple desi...
- Patent number 9,122,826
- Issue date Sep 1, 2015
- Altera Corporation
- Terry Borer
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 8,589,849
- Issue date Nov 19, 2013
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
M/A for performing incremental compilation using top-down and botto...
- Patent number 8,589,838
- Issue date Nov 19, 2013
- Altera Corporation
- Terry Borer
- G01 - MEASURING TESTING
Information Patent Grant
Specifying placement and routing constraints for security and redun...
- Patent number 8,434,044
- Issue date Apr 30, 2013
- Altera Corporation
- David Samuel Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing incremental compilation using t...
- Patent number 8,250,505
- Issue date Aug 21, 2012
- Altera Corporation
- Terry Borer
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for performing incremental compilation using t...
- Patent number 7,669,157
- Issue date Feb 23, 2010
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing layout-driven optimizations on...
- Patent number 7,594,204
- Issue date Sep 22, 2009
- Altera Corporation
- Deshanand Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing incremental compilation
- Patent number 7,464,362
- Issue date Dec 9, 2008
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing retiming on field programmable...
- Patent number 7,360,190
- Issue date Apr 15, 2008
- Altera Corporation
- Deshanand Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing logic replication in field prog...
- Patent number 7,257,800
- Issue date Aug 14, 2007
- Altera Corporation
- Deshanand Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing soft constraints in tools use...
- Patent number 7,194,720
- Issue date Mar 20, 2007
- Altera Corporation
- Terry P. Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for placement of components onto programmable...
- Patent number 7,181,717
- Issue date Feb 20, 2007
- Altera Corporation
- Deshanand P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for placement of components onto programmable...
- Patent number 6,779,169
- Issue date Aug 17, 2004
- Altera Corporation
- Deshanand P. Singh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FAST FPGA COMPILATION THROUGH BITSTREAM STITCHING
- Publication number 20230333826
- Publication date Oct 19, 2023
- Michael Kinsner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modular Compilation Flows for a Programmable Logic Device
- Publication number 20230237231
- Publication date Jul 27, 2023
- Intel Corporation
- Byron Sinclair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING FAST INCREMENTAL PHYSICAL DESIG...
- Publication number 20200257839
- Publication date Aug 13, 2020
- Altera Corporation
- Junaid Asim Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Implementing Soft Constraints in Tools Use...
- Publication number 20170337318
- Publication date Nov 23, 2017
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Implementing Soft Constraints in Tools Use...
- Publication number 20140047405
- Publication date Feb 13, 2014
- Altera Corporation
- Terry Borer
- G06 - COMPUTING CALCULATING COUNTING

Gabriel Quan

Person

Patents Grantslast 30 patents

Method and apparatus for performing fast incremental physical desig...

Method and apparatus for performing fast incremental physical desig...

Method and apparatus for implementing soft constraints in tools use...

Method and apparatus for performing fast incremental physical desig...

Method and apparatus for performing compilation using multiple desi...

Method and apparatus for implementing soft constraints in tools use...

M/A for performing incremental compilation using top-down and botto...

Specifying placement and routing constraints for security and redun...

Method and apparatus for performing incremental compilation using t...

Method and apparatus for performing incremental compilation using t...

Method and apparatus for performing layout-driven optimizations on...

Method and apparatus for performing incremental compilation

Method and apparatus for performing retiming on field programmable...

Method and apparatus for performing logic replication in field prog...

Method and apparatus for implementing soft constraints in tools use...

Method and apparatus for placement of components onto programmable...

Method and apparatus for placement of components onto programmable...

Patents Applicationslast 30 patents

FAST FPGA COMPILATION THROUGH BITSTREAM STITCHING

Modular Compilation Flows for a Programmable Logic Device

METHOD AND APPARATUS FOR PERFORMING FAST INCREMENTAL PHYSICAL DESIG...

Method and Apparatus for Implementing Soft Constraints in Tools Use...

Method and Apparatus for Implementing Soft Constraints in Tools Use...