Gabriel Roland Munguia

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hardware register access via task tag ID
- Patent number 7,627,869
- Issue date Dec 1, 2009
- NXP B.V.
- Lonnie Goff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective access to multiple registers having a common name
- Patent number 6,666,383
- Issue date Dec 23, 2003
- Koninklijke Philips Electronics N.V.
- Lonnie C. Goff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address dependent retry system to program the retry latency of an i...
- Patent number 6,081,859
- Issue date Jun 27, 2000
- VLSI Technology, Inc.
- Gabriel Roland Munguia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predictive arbitration system for PCI bus agents
- Patent number 5,933,610
- Issue date Aug 3, 1999
- VLSI Technology, Inc.
- Peter Chambers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined consective byte update buffer
- Patent number 5,892,978
- Issue date Apr 6, 1999
- VLSI Technology, Inc.
- Gabriel R. Munguia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive arbitration mechanism for a shared multi-master bus
- Patent number 5,845,096
- Issue date Dec 1, 1998
- VLSI Technology, Inc.
- Gabriel Roland Munguia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherent cache structures and methods
- Patent number 5,029,070
- Issue date Jul 2, 1991
- Edge Computer Corporation
- Daniel M. McCarthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherent cache structures and methods
- Patent number 4,928,225
- Issue date May 22, 1990
- Edgcore Technology, Inc.
- Daniel M. McCarthy
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
COMMUNICATION BETWEEN CIRCUITS WITH DIFFERENT CLOCK FREQUENCIES
- Publication number 20240427370
- Publication date Dec 26, 2024
- Intel Corporation
- Gabriel Munguia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Register Access Via Task Tag Id
- Publication number 20080209427
- Publication date Aug 28, 2008
- Lonnie Goff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error rate based power management of a high-speed serial link
- Publication number 20080049716
- Publication date Feb 28, 2008
- Intel Corporation
- Peter R. Munguia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flow control credit synchronization
- Publication number 20050137966
- Publication date Jun 23, 2005
- Peter R. Munguia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selective access to multiple registers having a common name
- Publication number 20020179719
- Publication date Dec 5, 2002
- Lonnie C. Goff
- G06 - COMPUTING CALCULATING COUNTING

Gabriel Roland Munguia

Person

Patents Grantslast 30 patents

Hardware register access via task tag ID

Selective access to multiple registers having a common name

Address dependent retry system to program the retry latency of an i...

Predictive arbitration system for PCI bus agents

Combined consective byte update buffer

Adaptive arbitration mechanism for a shared multi-master bus

Coherent cache structures and methods

Coherent cache structures and methods

Patents Applicationslast 30 patents

COMMUNICATION BETWEEN CIRCUITS WITH DIFFERENT CLOCK FREQUENCIES

Hardware Register Access Via Task Tag Id

Error rate based power management of a high-speed serial link

Flow control credit synchronization

Selective access to multiple registers having a common name