Gary Bronner

Person

Los Altos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-annealing data storage system
- Patent number 12,002,513
- Issue date Jun 4, 2024
- RAMBUS INC.
- Gary B. Bronner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Processing unit with fast read speed memory device
- Patent number 11,984,163
- Issue date May 14, 2024
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory structure with positioned doping
- Patent number 11,963,465
- Issue date Apr 16, 2024
- Hefei Reliance Memory Limited
- Zhichao Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive ram
- Patent number 11,908,515
- Issue date Feb 20, 2024
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast read speed memory device
- Patent number 11,651,820
- Issue date May 16, 2023
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory structure with positioned doping
- Patent number 11,653,580
- Issue date May 16, 2023
- Hefei Reliance Memory Limited
- Zhichao Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Fractional program commands for memory devices
- Patent number 11,651,823
- Issue date May 16, 2023
- RAMBUS INC.
- Brent S. Haukness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 11,568,929
- Issue date Jan 31, 2023
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for initializing resistive memory devices by applying vo...
- Patent number 11,468,947
- Issue date Oct 11, 2022
- Hefei Reliance Memory Limited
- Zhichao Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit shield
- Patent number 11,329,010
- Issue date May 10, 2022
- Cryptography Research, Inc.
- Scott C. Best
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fast read speed memory device
- Patent number 11,257,544
- Issue date Feb 22, 2022
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory rank configuration
- Patent number 11,244,727
- Issue date Feb 8, 2022
- RAMBUS INC.
- Gary B. Bronner
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 11,081,176
- Issue date Aug 3, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory structure with positioned doping
- Patent number 11,018,295
- Issue date May 25, 2021
- Hefei Reliance Memory Limited
- Zhichao Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for initializing resistive memory devices by applying di...
- Patent number 10,943,655
- Issue date Mar 9, 2021
- Hefei Reliance Memory Limited
- Zhichao Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Fractional program commands for memory devices
- Patent number 10,861,554
- Issue date Dec 8, 2020
- RAMBUS INC.
- Brent S. Haukness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast read speed memory device
- Patent number 10,825,518
- Issue date Nov 3, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive ram
- Patent number 10,622,062
- Issue date Apr 14, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistance memory cell
- Patent number 10,614,883
- Issue date Apr 7, 2020
- Hefei Reliance Memory Limited
- Mark D. Kellam
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast read speed memory device
- Patent number 10,388,375
- Issue date Aug 20, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistance memory cell
- Patent number 10,366,751
- Issue date Jul 30, 2019
- Hefei Reliance Memory Limited
- Mark D. Kellam
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 10,199,098
- Issue date Feb 5, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 10,037,801
- Issue date Jul 31, 2018
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Fractional program commands for memory devices
- Patent number 9,966,142
- Issue date May 8, 2018
- Rambus Inc.
- Brent S. Haukness
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast read speed memory device
- Patent number 9,941,005
- Issue date Apr 10, 2018
- Rambus Inc.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistance memory cell
- Patent number 9,934,851
- Issue date Apr 3, 2018
- Rambus Inc.
- Mark D. Kellam
- G11 - INFORMATION STORAGE
Information Patent Grant
1D-2R memory architecture
- Patent number 9,570,165
- Issue date Feb 14, 2017
- Rambus Inc.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse control for non-volatile memory
- Patent number 9,564,225
- Issue date Feb 7, 2017
- Rambus Inc.
- Mark D. Kellam
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast read speed memory device
- Patent number 9,490,009
- Issue date Nov 8, 2016
- Rambus Inc.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced refresh power
- Patent number 9,490,002
- Issue date Nov 8, 2016
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE MEMORY STRUCTURE WITH POSITIONED DOPING
- Publication number 20230225227
- Publication date Jul 13, 2023
- Hefei Reliance Memory Limited
- Zhichao LU
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20230154531
- Publication date May 18, 2023
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR INITIALIZING RESISTIVE MEMORY DEVICES BY APPLYING VO...
- Publication number 20230012275
- Publication date Jan 12, 2023
- Hefei Reliance Memory Limited
- Zhichao LU
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC MEMORY RANK CONFIGURATION
- Publication number 20220238159
- Publication date Jul 28, 2022
- Rambus Inc.
- Gary B. Bronner
- G11 - INFORMATION STORAGE
Information Patent Application
FAST READ SPEED MEMORY DEVICE
- Publication number 20220157378
- Publication date May 19, 2022
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
FAST READ SPEED MEMORY DEVICE
- Publication number 20220130459
- Publication date Apr 28, 2022
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20210295913
- Publication date Sep 23, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY STRUCTURE WITH POSITIONED DOPING
- Publication number 20210234093
- Publication date Jul 29, 2021
- Hefei Reliance Memory Limited
- Zhichao LU
- G11 - INFORMATION STORAGE
Information Patent Application
FRACTIONAL PROGRAM COMMANDS FOR MEMORY DEVICES
- Publication number 20210174875
- Publication date Jun 10, 2021
- Rambus Inc.
- Brent S. Haukness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR INITIALIZING RESISTIVE MEMORY DEVICES BY APPLYING DI...
- Publication number 20210110870
- Publication date Apr 15, 2021
- Hefei Reliance Memory Limited
- Zhichao LU
- G11 - INFORMATION STORAGE
Information Patent Application
FAST READ SPEED MEMORY DEVICE
- Publication number 20200411093
- Publication date Dec 31, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT SHIELD
- Publication number 20200328163
- Publication date Oct 15, 2020
- Cryptography Research, Inc.
- Scott C. BEST
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20200211644
- Publication date Jul 2, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR INITIALIZING RESISTIVE MEMORY DEVICES
- Publication number 20190392897
- Publication date Dec 26, 2019
- Hefei Reliance Memory Limited
- Zhichao LU
- G11 - INFORMATION STORAGE
Information Patent Application
FAST READ SPEED MEMORY DEVICE
- Publication number 20190348115
- Publication date Nov 14, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTANCE MEMORY CELL
- Publication number 20190341104
- Publication date Nov 7, 2019
- Hefei Reliance Memory Limited
- Mark D. Kellam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY STRUCTURE WITH POSITIONED DOPING
- Publication number 20190288195
- Publication date Sep 19, 2019
- Hefei Reliance Memory Limited
- Zhichao LU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20190156886
- Publication date May 23, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20180330782
- Publication date Nov 15, 2018
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
FRACTIONAL PROGRAM COMMANDS FOR MEMORY DEVICES
- Publication number 20180301194
- Publication date Oct 18, 2018
- RAMBUS INC.
- Brent S. Haukness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESISTANCE MEMORY CELL
- Publication number 20180286479
- Publication date Oct 4, 2018
- Hefei Reliance Memory Limited
- Mark D. Kellam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAST READ SPEED MEMORY DEVICE
- Publication number 20180286480
- Publication date Oct 4, 2018
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
FAST READ SPEED MEMORY DEVICE
- Publication number 20170110188
- Publication date Apr 20, 2017
- RAMBUS INC.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20160379710
- Publication date Dec 29, 2016
- RAMBUS INC.
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTANCE MEMORY CELL
- Publication number 20160240249
- Publication date Aug 18, 2016
- RAMBUS INC.
- Mark D. Kellam
- G11 - INFORMATION STORAGE
Information Patent Application
FAST READ SPEED MEMORY DEVICE
- Publication number 20160118116
- Publication date Apr 28, 2016
- RAMBUS INC.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC MEMORY RANK CONFIGURATION
- Publication number 20160071608
- Publication date Mar 10, 2016
- RAMBUS INC.
- Gary B. Bronner
- G11 - INFORMATION STORAGE
Information Patent Application
Pulse Control For Non-Volatile Memory
- Publication number 20160027515
- Publication date Jan 28, 2016
- RAMBUS INC.
- Mark D. Kellam
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED REFRESH POWER
- Publication number 20160027498
- Publication date Jan 28, 2016
- RAMBUS INC.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
1D-2R MEMORY ARCHITECTURE
- Publication number 20150162382
- Publication date Jun 11, 2015
- RAMBUS INC.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE

Gary Bronner

Person

Patents Grantslast 30 patents

Self-annealing data storage system

Processing unit with fast read speed memory device

Non-volatile memory structure with positioned doping

2T-1R architecture for resistive ram

Fast read speed memory device

Non-volatile memory structure with positioned doping

Fractional program commands for memory devices

2T-1R architecture for resistive RAM

Techniques for initializing resistive memory devices by applying vo...

Integrated circuit shield

Fast read speed memory device

Dynamic memory rank configuration

2T-1R architecture for resistive RAM

Non-volatile memory structure with positioned doping

Techniques for initializing resistive memory devices by applying di...

Fractional program commands for memory devices

Fast read speed memory device

2T-1R architecture for resistive ram

Resistance memory cell

Fast read speed memory device

Resistance memory cell

2T-1R architecture for resistive RAM

2T-1R architecture for resistive RAM

Fractional program commands for memory devices

Fast read speed memory device

Resistance memory cell

1D-2R memory architecture

Pulse control for non-volatile memory

Fast read speed memory device

Reduced refresh power

Patents Applicationslast 30 patents

NON-VOLATILE MEMORY STRUCTURE WITH POSITIONED DOPING

2T-1R ARCHITECTURE FOR RESISTIVE RAM

TECHNIQUES FOR INITIALIZING RESISTIVE MEMORY DEVICES BY APPLYING VO...

DYNAMIC MEMORY RANK CONFIGURATION

FAST READ SPEED MEMORY DEVICE

FAST READ SPEED MEMORY DEVICE

2T-1R ARCHITECTURE FOR RESISTIVE RAM

NON-VOLATILE MEMORY STRUCTURE WITH POSITIONED DOPING

FRACTIONAL PROGRAM COMMANDS FOR MEMORY DEVICES

TECHNIQUES FOR INITIALIZING RESISTIVE MEMORY DEVICES BY APPLYING DI...

FAST READ SPEED MEMORY DEVICE

INTEGRATED CIRCUIT SHIELD

2T-1R ARCHITECTURE FOR RESISTIVE RAM

TECHNIQUES FOR INITIALIZING RESISTIVE MEMORY DEVICES

FAST READ SPEED MEMORY DEVICE

RESISTANCE MEMORY CELL

NON-VOLATILE MEMORY STRUCTURE WITH POSITIONED DOPING

2T-1R ARCHITECTURE FOR RESISTIVE RAM

2T-1R ARCHITECTURE FOR RESISTIVE RAM

FRACTIONAL PROGRAM COMMANDS FOR MEMORY DEVICES

RESISTANCE MEMORY CELL

FAST READ SPEED MEMORY DEVICE

FAST READ SPEED MEMORY DEVICE

2T-1R ARCHITECTURE FOR RESISTIVE RAM

RESISTANCE MEMORY CELL

FAST READ SPEED MEMORY DEVICE

DYNAMIC MEMORY RANK CONFIGURATION

Pulse Control For Non-Volatile Memory

REDUCED REFRESH POWER

1D-2R MEMORY ARCHITECTURE