Gary D. Grise

Person

Milton, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Clock edge grouping for at-speed test
- Patent number 8,538,718
- Issue date Sep 17, 2013
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Microcontroller for logic built-in self test (LBIST)
- Patent number 8,423,847
- Issue date Apr 16, 2013
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Microcontroller for logic built-in self test (LBIST)
- Patent number 8,205,124
- Issue date Jun 19, 2012
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Integrated test waveform generator (TWG) and customer waveform gene...
- Patent number 7,996,807
- Issue date Aug 9, 2011
- International Business Machines Corporation
- Gary D. Grise
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for generating at-speed structural tests to impro...
- Patent number 7,856,607
- Issue date Dec 21, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Functional frequency testing of integrated circuits
- Patent number 7,840,864
- Issue date Nov 23, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Functional frequency testing of integrated circuits
- Patent number 7,840,863
- Issue date Nov 23, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Method of increasing path coverage in transition test generation
- Patent number 7,793,176
- Issue date Sep 7, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Identifying sequential functional paths for IC testing methods and...
- Patent number 7,784,000
- Issue date Aug 24, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Design structure for shutting off data capture across asynchronous...
- Patent number 7,779,375
- Issue date Aug 17, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for selectively implementing launch off scan c...
- Patent number 7,721,170
- Issue date May 18, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Functional frequency testing of integrated circuits
- Patent number 7,698,611
- Issue date Apr 13, 2010
- International Business Machines Corporation
- Gary Grise
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for shutting off data capture across asynchron...
- Patent number 7,685,542
- Issue date Mar 23, 2010
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
IC chip at-functional-speed testing with process coverage evaluation
- Patent number 7,620,921
- Issue date Nov 17, 2009
- International Business Machines Corporation
- Eric A. Foreman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing of multiple asynchronous logic domains
- Patent number 7,529,294
- Issue date May 5, 2009
- International Business Machines Corporation
- Gary Douglas Grise
- G01 - MEASURING TESTING
Information Patent Grant
Microcontroller for logic built-in self test (LBIST)
- Patent number 7,490,280
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Functional frequency testing of integrated circuits
- Patent number 7,290,191
- Issue date Oct 30, 2007
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Clock control circuit for test that facilitates an at speed structu...
- Patent number 7,240,266
- Issue date Jul 3, 2007
- International Business Machines Corporation
- Henry R. Farmer
- G01 - MEASURING TESTING
Information Patent Grant
Integrated heat exchanger for memory module
- Patent number 6,025,992
- Issue date Feb 15, 2000
- International Business Machines Corp.
- Richard Charles Dodge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-destructive target marking for image stitching
- Patent number 5,663,806
- Issue date Sep 2, 1997
- International Business Machines Corp.
- Gary Grise
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Non-volatile memory cell having Si rich silicon nitride charge trap...
- Patent number 4,870,470
- Issue date Sep 26, 1989
- International Business Machines Corporation
- Roy S. Bass
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-inverting non-volatile dynamic RAM cell
- Patent number 4,446,535
- Issue date May 1, 1984
- International Business Machines Corporation
- Donald P. Gaffney
- G11 - INFORMATION STORAGE
Information Patent Grant
Dense electrically alterable read only memory
- Patent number 4,375,085
- Issue date Feb 22, 1983
- International Business Machines Corporation
- Gary D. Grise
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)
- Publication number 20120221910
- Publication date Aug 30, 2012
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
CLOCK EDGE GROUPING FOR AT-SPEED TEST
- Publication number 20120150473
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS
- Publication number 20100088561
- Publication date Apr 8, 2010
- International Business Machines Corporation
- Gary D. Grise
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS
- Publication number 20100088562
- Publication date Apr 8, 2010
- International Business Machines Corporation
- Gary D. Grise
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED TEST WAVEFORM GENERATOR (TWG) AND CUSTOMER WAVEFORM GENE...
- Publication number 20090265677
- Publication date Oct 22, 2009
- Gary D. Grise
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDENTIFYING SEQUENTIAL FUNCTIONAL PATHS FOR IC TESTING METHODS AND...
- Publication number 20090240459
- Publication date Sep 24, 2009
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR GENERATING AT-SPEED STRUCTURAL TESTS TO IMPRO...
- Publication number 20090119629
- Publication date May 7, 2009
- Gary D. Grise
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN STRUCTURE FOR SHUTTING OFF DATA CAPTURE ACROSS ASYNCHRONOUS...
- Publication number 20090102507
- Publication date Apr 23, 2009
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS AND METHOD FOR SELECTIVELY IMPLEMENTING LAUNCH OFF SCAN C...
- Publication number 20090106608
- Publication date Apr 23, 2009
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)
- Publication number 20090055696
- Publication date Feb 26, 2009
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
IC CHIP AT-FUNCTIONAL-SPEED TESTING WITH PROCESS COVERAGE EVALUATION
- Publication number 20080270953
- Publication date Oct 30, 2008
- Eric A. Foreman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Increasing Path Coverage in Transition Test Generation
- Publication number 20080250279
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR AUTOMATIC TEST PATTERN GENERATION FOR ONE TEST CONSTRAIN...
- Publication number 20080222472
- Publication date Sep 11, 2008
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR SHUTTING OFF DATA CAPTURE ACROSS ASYNCHRON...
- Publication number 20080195905
- Publication date Aug 14, 2008
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
SCAN CHAIN CIRCUITRY THAT ENABLES SCAN TESTING AT FUNCTIONAL CLOCK...
- Publication number 20080005634
- Publication date Jan 3, 2008
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS
- Publication number 20070283201
- Publication date Dec 6, 2007
- Gary D. Grise
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TESTING OF MULTIPLE ASYNCHRONOUS LOGIC DOMAINS
- Publication number 20070204194
- Publication date Aug 30, 2007
- Gary Douglas Grise
- G01 - MEASURING TESTING
Information Patent Application
MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)
- Publication number 20070204193
- Publication date Aug 30, 2007
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Application
CLOCK CONTROL CIRCUIT FOR TEST THAT FACILITATES AN AT SPEED STRUCTU...
- Publication number 20060248417
- Publication date Nov 2, 2006
- International Business Machines Corporation
- Henry R. Farmer
- G01 - MEASURING TESTING
Information Patent Application
CLOCK CONTROL CIRCUIT FOR TEST THAT FACILITATES AN AT SPEED STRUCTU...
- Publication number 20060190781
- Publication date Aug 24, 2006
- International Business Machines Corporation
- Henry R. Farmer
- G01 - MEASURING TESTING
Information Patent Application
FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS
- Publication number 20060041802
- Publication date Feb 23, 2006
- International Business Machines Corporation
- Gary D. Grise
- H03 - BASIC ELECTRONIC CIRCUITRY

Gary D. Grise

Person

Patents Grantslast 30 patents

Clock edge grouping for at-speed test

Microcontroller for logic built-in self test (LBIST)

Microcontroller for logic built-in self test (LBIST)

Integrated test waveform generator (TWG) and customer waveform gene...

System and method for generating at-speed structural tests to impro...

Functional frequency testing of integrated circuits

Functional frequency testing of integrated circuits

Method of increasing path coverage in transition test generation

Identifying sequential functional paths for IC testing methods and...

Design structure for shutting off data capture across asynchronous...

Apparatus and method for selectively implementing launch off scan c...

Functional frequency testing of integrated circuits

Method and apparatus for shutting off data capture across asynchron...

IC chip at-functional-speed testing with process coverage evaluation

Testing of multiple asynchronous logic domains

Microcontroller for logic built-in self test (LBIST)

Functional frequency testing of integrated circuits

Clock control circuit for test that facilitates an at speed structu...

Integrated heat exchanger for memory module

Non-destructive target marking for image stitching

Non-volatile memory cell having Si rich silicon nitride charge trap...

Non-inverting non-volatile dynamic RAM cell

Dense electrically alterable read only memory

Patents Applicationslast 30 patents

MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)

CLOCK EDGE GROUPING FOR AT-SPEED TEST

FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS

FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS

INTEGRATED TEST WAVEFORM GENERATOR (TWG) AND CUSTOMER WAVEFORM GENE...

INDENTIFYING SEQUENTIAL FUNCTIONAL PATHS FOR IC TESTING METHODS AND...

SYSTEM AND METHOD FOR GENERATING AT-SPEED STRUCTURAL TESTS TO IMPRO...

DESIGN STRUCTURE FOR SHUTTING OFF DATA CAPTURE ACROSS ASYNCHRONOUS...

APPARATUS AND METHOD FOR SELECTIVELY IMPLEMENTING LAUNCH OFF SCAN C...

MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)

IC CHIP AT-FUNCTIONAL-SPEED TESTING WITH PROCESS COVERAGE EVALUATION

Method of Increasing Path Coverage in Transition Test Generation

METHOD FOR AUTOMATIC TEST PATTERN GENERATION FOR ONE TEST CONSTRAIN...

METHOD AND APPARATUS FOR SHUTTING OFF DATA CAPTURE ACROSS ASYNCHRON...

SCAN CHAIN CIRCUITRY THAT ENABLES SCAN TESTING AT FUNCTIONAL CLOCK...

FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS

TESTING OF MULTIPLE ASYNCHRONOUS LOGIC DOMAINS

MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)

CLOCK CONTROL CIRCUIT FOR TEST THAT FACILITATES AN AT SPEED STRUCTU...

CLOCK CONTROL CIRCUIT FOR TEST THAT FACILITATES AN AT SPEED STRUCTU...

FUNCTIONAL FREQUENCY TESTING OF INTEGRATED CIRCUITS