Gensuke Goto

Person

Kawasaki-shi, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Multiplier circuit for reducing the number of necessary elements wi...
- Patent number 6,535,902
- Issue date Mar 18, 2003
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier circuit for reducing the number of necessary elements wi...
- Patent number 6,240,438
- Issue date May 29, 2001
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression circuit of an adder circuit
- Patent number 5,920,498
- Issue date Jul 6, 1999
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed digital parallel multiplier
- Patent number 5,465,226
- Issue date Nov 7, 1995
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary operator using block select look ahead system which serves a...
- Patent number 5,434,810
- Issue date Jul 18, 1995
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic circuit having carry select adders
- Patent number 5,047,976
- Issue date Sep 10, 1991
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carry propagation circuit of parallel-type full adder
- Patent number 5,025,409
- Issue date Jun 18, 1991
- Fujitsu Limited
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Masterslice semiconductor device
- Patent number 4,668,972
- Issue date May 26, 1987
- Fujitsu Limited
- Shinji Sato
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Multiplier circuit for reducing the number of necessary elements wi...
- Publication number 20010016865
- Publication date Aug 23, 2001
- FUJITSU LIMITED
- Gensuke Goto
- G06 - COMPUTING CALCULATING COUNTING

Gensuke Goto

Person

Patents Grantslast 30 patents

Multiplier circuit for reducing the number of necessary elements wi...

Multiplier circuit for reducing the number of necessary elements wi...

Compression circuit of an adder circuit

High speed digital parallel multiplier

Binary operator using block select look ahead system which serves a...

Logic circuit having carry select adders

Carry propagation circuit of parallel-type full adder

Masterslice semiconductor device

Patents Applicationslast 30 patents

Multiplier circuit for reducing the number of necessary elements wi...