Geoffrey Alan Gould

Person

El Dorado Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Configuring levels of program/erase protection in flash devices
- Patent number 8,375,189
- Issue date Feb 12, 2013
- Intel Corporation
- Shekoufeh Qawami
- G11 - INFORMATION STORAGE
Information Patent Grant
Data invalid signal for non-deterministic latency in a memory system
- Patent number 7,571,297
- Issue date Aug 4, 2009
- Intel Corporation
- Geoffrey Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal nonvolatile memory boot mode
- Patent number 7,496,719
- Issue date Feb 24, 2009
- Intel Corporation
- Steven Peterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address scrambling to simplify memory controller's address output m...
- Patent number 7,493,467
- Issue date Feb 17, 2009
- Intel Corporation
- Geoffrey A Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for queuing and absorbing erase commands in a nonvolatile m...
- Patent number 5,956,742
- Issue date Sep 21, 1999
- Intel Corporation
- Mickey Lee Fandrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for prioritizing erase and program commands in a nonvolatil...
- Patent number 5,809,541
- Issue date Sep 15, 1998
- Intel Corporation
- Mickey Lee Fandrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of prioritizing subsequently received program and erase comm...
- Patent number 5,802,343
- Issue date Sep 1, 1998
- Intel Corporation
- Mickey Lee Fandrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for selectively locking write access to blocks in...
- Patent number 5,592,641
- Issue date Jan 7, 1997
- Intel Corporation
- Mickey L. Fandrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for searching for data in multi-bit flash EEPR...
- Patent number 5,563,828
- Issue date Oct 8, 1996
- Intel Corporation
- Robert Hasbun
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for preconditioning a nonvolatile memory array
- Patent number 5,537,357
- Issue date Jul 16, 1996
- Intel Corporation
- Amit Merchant
- G11 - INFORMATION STORAGE
Information Patent Grant
Block specific status information in a memory device
- Patent number 5,369,754
- Issue date Nov 29, 1994
- Intel Corporation
- Mickey L. Fandrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block specific status information in a memory device
- Patent number 5,353,256
- Issue date Oct 4, 1994
- Intel Corporation
- Mickey L. Fandrich
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Data invalid signal for non-deterministic latency in a memory system
- Publication number 20070156991
- Publication date Jul 5, 2007
- Geoffrey Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configuring levels of program/erase protection in flash devices
- Publication number 20070157000
- Publication date Jul 5, 2007
- Shekoufeh Qawami
- G11 - INFORMATION STORAGE
Information Patent Application
Address scrambing to simplify memory controller's address output mu...
- Publication number 20070143568
- Publication date Jun 21, 2007
- Intel Corporation
- Geoffrey A. Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Relocatable overlay window to access supernumerary data resources
- Publication number 20070061500
- Publication date Mar 15, 2007
- Intel Corporation
- Geoffrey Gould
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Universal nonvolatile memory boot mode
- Publication number 20070028031
- Publication date Feb 1, 2007
- Intel Corporation
- Steven Peterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to avoid incoherency between a cache memory an...
- Publication number 20050273560
- Publication date Dec 8, 2005
- Jared E. Hulbert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Manipulating data for improving storage and transmission
- Publication number 20040205306
- Publication date Oct 14, 2004
- David Janas
- G11 - INFORMATION STORAGE
Information Patent Application
Portable computing device having a non-volatile memory device adapt...
- Publication number 20040123054
- Publication date Jun 24, 2004
- Geoffrey A. Gould
- G06 - COMPUTING CALCULATING COUNTING

Geoffrey Alan Gould

Person

Patents Grantslast 30 patents

Configuring levels of program/erase protection in flash devices

Data invalid signal for non-deterministic latency in a memory system

Universal nonvolatile memory boot mode

Address scrambling to simplify memory controller's address output m...

Methods for queuing and absorbing erase commands in a nonvolatile m...

Methods for prioritizing erase and program commands in a nonvolatil...

Method of prioritizing subsequently received program and erase comm...

Method and device for selectively locking write access to blocks in...

Method and apparatus for searching for data in multi-bit flash EEPR...

Method for preconditioning a nonvolatile memory array

Block specific status information in a memory device

Block specific status information in a memory device

Patents Applicationslast 30 patents

Data invalid signal for non-deterministic latency in a memory system

Configuring levels of program/erase protection in flash devices

Address scrambing to simplify memory controller's address output mu...

Relocatable overlay window to access supernumerary data resources

Universal nonvolatile memory boot mode

Method and apparatus to avoid incoherency between a cache memory an...

Manipulating data for improving storage and transmission

Portable computing device having a non-volatile memory device adapt...