George E. Bailey

Person

Welches, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method to improve the resolution of photolithography...
- Patent number 7,381,502
- Issue date Jun 3, 2008
- LSI Logic Corporation
- Michael Jay Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Optical error minimization in a semiconductor manufacturing apparatus
- Patent number 7,298,458
- Issue date Nov 20, 2007
- LSI Corporation
- Michael J. Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Optical error minimization in a semiconductor manufacturing apparatus
- Patent number 7,098,996
- Issue date Aug 29, 2006
- LSI Logic Corporation
- Michael J. Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Dual source lithography for direct write application
- Patent number 7,023,530
- Issue date Apr 4, 2006
- LSI Logic Corporation
- Michael J. Berman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chromeless phase shift mask
- Patent number 7,005,217
- Issue date Feb 28, 2006
- LSI Logic Corporation
- George E. Bailey
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for detecting backside contamination during fa...
- Patent number 6,943,055
- Issue date Sep 13, 2005
- LSI Logic Corporation
- Michael J. Berman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improving OPC modeling
- Patent number 6,934,929
- Issue date Aug 23, 2005
- LSI Logic Corporation
- Travis Brist
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Dual source lithography for direct write application
- Patent number 6,894,762
- Issue date May 17, 2005
- LSI Logic Corporation
- Michael J. Berman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optical error minimization in a semiconductor manufacturing apparatus
- Patent number 6,885,436
- Issue date Apr 26, 2005
- LSI Logic Corporation
- Michael J. Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Apparatus and method to improve the resolution of photolithography...
- Patent number 6,866,970
- Issue date Mar 15, 2005
- LSI Logic Corporation
- Michael Jay Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Wafer process critical dimension, alignment, and registration analy...
- Patent number 6,782,525
- Issue date Aug 24, 2004
- LSI Logic Corporation
- Mario Garza
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method to improve the resolution of a photolithography system by us...
- Patent number 6,764,749
- Issue date Jul 20, 2004
- LSI Logic Corporation
- Michael J. Berman
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method and apparatus for detecting backside contamination during fa...
- Patent number 6,627,466
- Issue date Sep 30, 2003
- LSI Logic Corporation
- Michael J. Berman
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Optical error minimization in a semiconductor manufacturing apparatus
- Publication number 20060238728
- Publication date Oct 26, 2006
- Michael J. Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Apparatus and method to improve the resolution of photolithography...
- Publication number 20050053851
- Publication date Mar 10, 2005
- LSI Logic Corporation
- Michael Jay Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Chromeless phase shift mask
- Publication number 20040197674
- Publication date Oct 7, 2004
- George E. Bailey
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for improving OPC modeling
- Publication number 20040139420
- Publication date Jul 15, 2004
- Travis Brist
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and apparatus for detecting backside contamination during fa...
- Publication number 20040069407
- Publication date Apr 15, 2004
- Michael J. Berman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and method to improve the resolution of photolithography...
- Publication number 20040067421
- Publication date Apr 8, 2004
- Michael J. Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Wafer process critical dimension, alignment, and registration analy...
- Publication number 20040049760
- Publication date Mar 11, 2004
- Mario Garza
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method to improve the resolution of a photolithography system by us...
- Publication number 20040018448
- Publication date Jan 29, 2004
- Michael J. Berman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

George E. Bailey

Person

Patents Grantslast 30 patents

Apparatus and method to improve the resolution of photolithography...

Optical error minimization in a semiconductor manufacturing apparatus

Optical error minimization in a semiconductor manufacturing apparatus

Dual source lithography for direct write application

Chromeless phase shift mask

Method and apparatus for detecting backside contamination during fa...

Method for improving OPC modeling

Dual source lithography for direct write application

Optical error minimization in a semiconductor manufacturing apparatus

Apparatus and method to improve the resolution of photolithography...

Wafer process critical dimension, alignment, and registration analy...

Method to improve the resolution of a photolithography system by us...

Method and apparatus for detecting backside contamination during fa...

Patents Applicationslast 30 patents

Optical error minimization in a semiconductor manufacturing apparatus

Apparatus and method to improve the resolution of photolithography...

Chromeless phase shift mask

Method for improving OPC modeling

Method and apparatus for detecting backside contamination during fa...

Apparatus and method to improve the resolution of photolithography...

Wafer process critical dimension, alignment, and registration analy...

Method to improve the resolution of a photolithography system by us...