Gerd Ehlers

Person

Grasbrunn, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Array processor having a segmented bus system
- Patent number 9,626,325
- Issue date Apr 18, 2017
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor chip with flexible bus system
- Patent number 9,256,575
- Issue date Feb 9, 2016
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical cell array and bus system
- Patent number 9,047,440
- Issue date Jun 2, 2015
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic cell array and bus system
- Patent number 8,471,593
- Issue date Jun 25, 2013
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline configuration protocol and configuration unit communication
- Patent number 8,468,329
- Issue date Jun 18, 2013
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline configuration protocol and configuration unit communication
- Patent number 8,301,872
- Issue date Oct 30, 2012
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus systems and reconfiguration methods
- Patent number 8,127,061
- Issue date Feb 28, 2012
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic cell array and bus system
- Patent number 8,058,899
- Issue date Nov 15, 2011
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic cell array and bus system
- Patent number 7,595,659
- Issue date Sep 29, 2009
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline configuration unit protocols and communication
- Patent number 7,003,660
- Issue date Feb 21, 2006
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Array Processor Having a Segmented Bus System
- Publication number 20190065428
- Publication date Feb 28, 2019
- Scientia Sol Mentis AG
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Array Processor Having a Segmented Bus System
- Publication number 20180300278
- Publication date Oct 18, 2018
- PACT XPP TECHNOLOGIES AG
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Array Processor Having a Segmented Bus System
- Publication number 20160154758
- Publication date Jun 2, 2016
- PACT XPP TECHNOLOGIES AG
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processor chip with flexible bus system
- Publication number 20150261722
- Publication date Sep 17, 2015
- PACT XPP TECHNOLOGIES AG
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel Processing Array of Arithmetic Unit having a Barrier Instr...
- Publication number 20150033000
- Publication date Jan 29, 2015
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logical cell array and bus system
- Publication number 20140359254
- Publication date Dec 4, 2014
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION
- Publication number 20140325175
- Publication date Oct 30, 2014
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION
- Publication number 20120311301
- Publication date Dec 6, 2012
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUS SYSTEMS AND METHODS FOR CONTROLLING DATA FLOW IN A FIELD OF PRO...
- Publication number 20120151113
- Publication date Jun 14, 2012
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC CELL ARRAY AND BUS SYSTEM
- Publication number 20120072699
- Publication date Mar 22, 2012
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC CELL ARRAY AND BUS SYSTEM
- Publication number 20090146691
- Publication date Jun 11, 2009
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pipeline configuration protocol and configuration unit communication
- Publication number 20050223212
- Publication date Oct 6, 2005
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pipeline configuration unit protocols and communication
- Publication number 20040025005
- Publication date Feb 5, 2004
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING

Gerd Ehlers

Person

Patents Grantslast 30 patents

Array processor having a segmented bus system

Data processor chip with flexible bus system

Logical cell array and bus system

Logic cell array and bus system

Pipeline configuration protocol and configuration unit communication

Pipeline configuration protocol and configuration unit communication

Bus systems and reconfiguration methods

Logic cell array and bus system

Logic cell array and bus system

Pipeline configuration unit protocols and communication

Patents Applicationslast 30 patents

Array Processor Having a Segmented Bus System

Array Processor Having a Segmented Bus System

Array Processor Having a Segmented Bus System

Data processor chip with flexible bus system

Parallel Processing Array of Arithmetic Unit having a Barrier Instr...

Logical cell array and bus system

PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION

PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION

BUS SYSTEMS AND METHODS FOR CONTROLLING DATA FLOW IN A FIELD OF PRO...

LOGIC CELL ARRAY AND BUS SYSTEM

LOGIC CELL ARRAY AND BUS SYSTEM

Pipeline configuration protocol and configuration unit communication

Pipeline configuration unit protocols and communication