Gerd Frankowsky

Person

Hoehenkirchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for monitoring a state, in particular of a fuse
- Patent number 7,483,326
- Issue date Jan 27, 2009
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and test device for determining a repair solution for a memo...
- Patent number 7,437,627
- Issue date Oct 14, 2008
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, test system and method for reading out an error...
- Patent number 7,434,125
- Issue date Oct 7, 2008
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Test system for testing integrated circuits and a method for config...
- Patent number 7,427,870
- Issue date Sep 23, 2008
- Infineon Technologies AG
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Grant
Method and device for verifying output signals of an integrated cir...
- Patent number 7,409,308
- Issue date Aug 5, 2008
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor circuit device and a system for testing a semiconduct...
- Patent number 7,331,005
- Issue date Feb 12, 2008
- Infineon Technologies AG
- Ralf Arnold
- G01 - MEASURING TESTING
Information Patent Grant
Integrated module having a plurality of separate substrates
- Patent number 7,228,473
- Issue date Jun 5, 2007
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for producing a component module
- Patent number 7,211,451
- Issue date May 1, 2007
- Infineon Technologies AG
- Thorsten Meyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test system for testing integrated chips and an adapter element for...
- Patent number 7,208,968
- Issue date Apr 24, 2007
- Infineon Technologies AG
- Frank Weber
- G01 - MEASURING TESTING
Information Patent Grant
Level-shifting circuitry having “high” output impedance during disa...
- Patent number 7,173,473
- Issue date Feb 6, 2007
- Infineon Technologies AG
- Hartmud Terletzki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor circuit module and method for fabricating semiconduct...
- Patent number 7,074,696
- Issue date Jul 11, 2006
- Infineon Technologies AG
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Calibration device for the calibration of a tester channel of a tes...
- Patent number 7,061,260
- Issue date Jun 13, 2006
- Infineon Technologies AG
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Grant
Multiple chip semiconductor arrangement having electrical component...
- Patent number 7,060,529
- Issue date Jun 13, 2006
- Infineon Technologies AG
- Manfred Reithinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated test circuit in an integrated circuit
- Patent number 7,034,559
- Issue date Apr 25, 2006
- Infineon Technologies AG
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Grant
Recording test information to identify memory cell errors
- Patent number 6,961,880
- Issue date Nov 1, 2005
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for activating fuse units in electronic circuit device
- Patent number 6,961,917
- Issue date Nov 1, 2005
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Off chip driver
- Patent number 6,958,626
- Issue date Oct 25, 2005
- Infineon Technologies AG
- Hartmud Terletzki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory device and method of storing fail addresses of a memory cell
- Patent number 6,937,531
- Issue date Aug 30, 2005
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Self trimming voltage generator
- Patent number 6,909,642
- Issue date Jun 21, 2005
- Infineon Technologies North American Corp.
- Gunther Lehmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Level-shifting circuitry having “high” output impedance during disa...
- Patent number 6,853,233
- Issue date Feb 8, 2005
- Infineon Technologies AG
- Hartmud Terletzki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for connection of circuit units
- Patent number 6,845,554
- Issue date Jan 25, 2005
- Infineon Technologies AG
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple chip semiconductor arrangement having electrical component...
- Patent number 6,815,803
- Issue date Nov 9, 2004
- Infineon Technologies AG
- Manfred Reithinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit technique for column redundancy fuse latches
- Patent number 6,809,972
- Issue date Oct 26, 2004
- Infineon Technologies AG
- Gunther Lehmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor circuit having contact points and configur...
- Patent number 6,734,474
- Issue date May 11, 2004
- Infineon Technologies AG
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method
- Patent number 6,730,989
- Issue date May 4, 2004
- Infineon Technologies AG
- Manfred Reithinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor component
- Patent number 6,727,586
- Issue date Apr 27, 2004
- Infineon Technologies AG
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for assessing the quality of a memory unit
- Patent number 6,717,870
- Issue date Apr 6, 2004
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for producing an electronic component having a plurality of...
- Patent number 6,714,418
- Issue date Mar 30, 2004
- Infineon Technologies AG
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fuse programmable I/O organization
- Patent number 6,707,746
- Issue date Mar 16, 2004
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of attaching semiconductor devices on a switching device and...
- Patent number 6,696,319
- Issue date Feb 24, 2004
- Infineon Technologies AG
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TEST APPARATUS FOR SEMICONDUCTOR MODULES
- Publication number 20090039910
- Publication date Feb 12, 2009
- QIMONDA AG
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND DEVICE FOR VERIFYING OUTPUT SIGNALS OF AN INTEGRATED CIR...
- Publication number 20080059102
- Publication date Mar 6, 2008
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Integrated circuit, test system and method for reading out an error...
- Publication number 20060262614
- Publication date Nov 23, 2006
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
Test system for testing integrated circuits and a method for config...
- Publication number 20060198211
- Publication date Sep 7, 2006
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor circuit device and a system for testing a semiconduct...
- Publication number 20060026475
- Publication date Feb 2, 2006
- Ralf Arnold
- G01 - MEASURING TESTING
Information Patent Application
Integrated module having a plurality of separate substrates
- Publication number 20050235180
- Publication date Oct 20, 2005
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Multi-chip module and method for testing
- Publication number 20050086564
- Publication date Apr 21, 2005
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Calibration device for the calibration of a tester channel of a tes...
- Publication number 20050046436
- Publication date Mar 3, 2005
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Off chip driver
- Publication number 20050024090
- Publication date Feb 3, 2005
- Infineon Technologies North America Corp.
- Hartmud Terletzki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory device and method of storing fail addresses of a memory cell
- Publication number 20050018497
- Publication date Jan 27, 2005
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
Test system for testing integrated chips and an adapter element for...
- Publication number 20050017748
- Publication date Jan 27, 2005
- Frank Weber
- G01 - MEASURING TESTING
Information Patent Application
Multiple chip semiconductor arrangement having electrical component...
- Publication number 20050001298
- Publication date Jan 6, 2005
- Manfred Reithinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated test circuit in an integrated circuit
- Publication number 20040222810
- Publication date Nov 11, 2004
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Method and test device for determining a repair solution for a memo...
- Publication number 20040223387
- Publication date Nov 11, 2004
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit having a test circuit
- Publication number 20040222812
- Publication date Nov 11, 2004
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT TECHNIQUE FOR COLUMN REDUNDANCY FUSE LATCHES
- Publication number 20040179412
- Publication date Sep 16, 2004
- Infineon Technologies North America Corp.
- Gunther Lehmann
- G11 - INFORMATION STORAGE
Information Patent Application
Self trimming voltage generator
- Publication number 20040179417
- Publication date Sep 16, 2004
- Gunther Lehmann
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR WAFER TESTING SYSTEM AND METHOD
- Publication number 20030173987
- Publication date Sep 18, 2003
- Gerd Frankowsky
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for monitoring a state, in particular of a fuse
- Publication number 20030174040
- Publication date Sep 18, 2003
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC MEMORY REFRESH CIRCUITRY
- Publication number 20030147295
- Publication date Aug 7, 2003
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
Method for activating fuse units in electronic circuit device
- Publication number 20030145303
- Publication date Jul 31, 2003
- Infineon Technologies AG
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
TWISTED BIT-LINE COMPENSATION
- Publication number 20030133320
- Publication date Jul 17, 2003
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
Method for connection of circuit units
- Publication number 20030110628
- Publication date Jun 19, 2003
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing an electronic component having a plurality of...
- Publication number 20030112610
- Publication date Jun 19, 2003
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for producing a component module
- Publication number 20030109072
- Publication date Jun 12, 2003
- Thorsten Meyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor component
- Publication number 20030094701
- Publication date May 22, 2003
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of attaching semiconductor devices on a switching device and...
- Publication number 20030085474
- Publication date May 8, 2003
- Gerd Frankowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fuse programmable I/O organization
- Publication number 20030026159
- Publication date Feb 6, 2003
- Infineon Technologies North America Corp.
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
Recording test information to identify memory cell errors
- Publication number 20030023902
- Publication date Jan 30, 2003
- Gerd Frankowsky
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable test socket
- Publication number 20030016038
- Publication date Jan 23, 2003
- Gerd Frankowsky
- G01 - MEASURING TESTING

Gerd Frankowsky

Person

Patents Grantslast 30 patents

Apparatus and method for monitoring a state, in particular of a fuse

Method and test device for determining a repair solution for a memo...

Integrated circuit, test system and method for reading out an error...

Test system for testing integrated circuits and a method for config...

Method and device for verifying output signals of an integrated cir...

Semiconductor circuit device and a system for testing a semiconduct...

Integrated module having a plurality of separate substrates

Process for producing a component module

Test system for testing integrated chips and an adapter element for...

Level-shifting circuitry having “high” output impedance during disa...

Semiconductor circuit module and method for fabricating semiconduct...

Calibration device for the calibration of a tester channel of a tes...

Multiple chip semiconductor arrangement having electrical component...

Integrated test circuit in an integrated circuit

Recording test information to identify memory cell errors

Method for activating fuse units in electronic circuit device

Off chip driver

Memory device and method of storing fail addresses of a memory cell

Self trimming voltage generator

Level-shifting circuitry having “high” output impedance during disa...

Method for connection of circuit units

Multiple chip semiconductor arrangement having electrical component...

Circuit technique for column redundancy fuse latches

Integrated semiconductor circuit having contact points and configur...

Semiconductor package and method

Semiconductor component

Method for assessing the quality of a memory unit

Method for producing an electronic component having a plurality of...

Fuse programmable I/O organization

Method of attaching semiconductor devices on a switching device and...

Patents Applicationslast 30 patents

TEST APPARATUS FOR SEMICONDUCTOR MODULES

METHOD AND DEVICE FOR VERIFYING OUTPUT SIGNALS OF AN INTEGRATED CIR...

Integrated circuit, test system and method for reading out an error...

Test system for testing integrated circuits and a method for config...

Semiconductor circuit device and a system for testing a semiconduct...

Integrated module having a plurality of separate substrates

Multi-chip module and method for testing

Calibration device for the calibration of a tester channel of a tes...

Off chip driver

Memory device and method of storing fail addresses of a memory cell

Test system for testing integrated chips and an adapter element for...

Multiple chip semiconductor arrangement having electrical component...

Integrated test circuit in an integrated circuit

Method and test device for determining a repair solution for a memo...

Integrated circuit having a test circuit

CIRCUIT TECHNIQUE FOR COLUMN REDUNDANCY FUSE LATCHES

Self trimming voltage generator

SEMICONDUCTOR WAFER TESTING SYSTEM AND METHOD

Apparatus and method for monitoring a state, in particular of a fuse

DYNAMIC MEMORY REFRESH CIRCUITRY

Method for activating fuse units in electronic circuit device

TWISTED BIT-LINE COMPENSATION

Method for connection of circuit units

Method for producing an electronic component having a plurality of...

Process for producing a component module

Semiconductor component

Method of attaching semiconductor devices on a switching device and...

Fuse programmable I/O organization

Recording test information to identify memory cell errors

Programmable test socket