Gerhard Risse

Person

Munchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Memory-module controller, memory controller and corresponding memor...
- Patent number 8,250,436
- Issue date Aug 21, 2012
- Qimonda AG
- Torsten Hinz
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory-module controller, memory controller and corresponding memor...
- Patent number 8,078,937
- Issue date Dec 13, 2011
- Qimonda AG
- Torsten Hinz
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module system and method for operating a memory module
- Patent number 7,899,984
- Issue date Mar 1, 2011
- Qimonda AG
- Gerhard Risse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronization and scheduling of a dual master serial channel
- Patent number 7,865,641
- Issue date Jan 4, 2011
- Qimonda AG
- Gerhard Risse
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory buffer for an FB-DIMM
- Patent number 7,730,254
- Issue date Jun 1, 2010
- Qimonda AG
- Gerhard Risse
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Memory-Module Controller, Memory Controller and Corresponding Memor...
- Publication number 20120110414
- Publication date May 3, 2012
- Qimonda AG
- Torsten Hinz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-MODULE CONTROLLER, MEMORY CONTROLLER AND CORRESPONDING MEMOR...
- Publication number 20090037764
- Publication date Feb 5, 2009
- Qimonda AG
- Torsten Hinz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Buffer for an FB-DIMM
- Publication number 20080177940
- Publication date Jul 24, 2008
- Gerhard Risse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory module, memory controller, communication unit, and method of...
- Publication number 20080133817
- Publication date Jun 5, 2008
- Ulrich Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronization and scheduling of a dual master serial channel
- Publication number 20080080564
- Publication date Apr 3, 2008
- Gerhard Risse
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY MODULE SYSTEM AND METHOD FOR OPERATING A MEMORY MODULE
- Publication number 20080077732
- Publication date Mar 27, 2008
- QIMONDA AG
- Gerhard Risse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatus related to memory modules
- Publication number 20070277016
- Publication date Nov 29, 2007
- Gerhard Risse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Arrangement And Method For Error Correction
- Publication number 20070255999
- Publication date Nov 1, 2007
- Qimonda AG
- Gerhard Risse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor arrangement and method for operating a semiconductor...
- Publication number 20070198764
- Publication date Aug 23, 2007
- Gerhard Risse
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method of operating memory device
- Publication number 20070079186
- Publication date Apr 5, 2007
- Gerhard Risse
- G11 - INFORMATION STORAGE

Gerhard Risse

Person

Patents Grantslast 30 patents

Memory-module controller, memory controller and corresponding memor...

Memory-module controller, memory controller and corresponding memor...

Memory module system and method for operating a memory module

Synchronization and scheduling of a dual master serial channel

Memory buffer for an FB-DIMM

Patents Applicationslast 30 patents

Memory-Module Controller, Memory Controller and Corresponding Memor...

MEMORY-MODULE CONTROLLER, MEMORY CONTROLLER AND CORRESPONDING MEMOR...

Memory Buffer for an FB-DIMM

Memory module, memory controller, communication unit, and method of...

Synchronization and scheduling of a dual master serial channel

MEMORY MODULE SYSTEM AND METHOD FOR OPERATING A MEMORY MODULE

Methods and apparatus related to memory modules

Memory Arrangement And Method For Error Correction

Semiconductor arrangement and method for operating a semiconductor...

Memory device and method of operating memory device