Gianluca Boselli

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Electrostatic discharge devices
- Patent number 10,446,537
- Issue date Oct 15, 2019
- Texas Instruments Incorporated
- Gianluca Boselli
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Electrostatic discharge device
- Patent number 10,396,199
- Issue date Aug 27, 2019
- Texas Instruments Incorporated
- Aravind C. Appaswamy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ESD robust MOS device
- Patent number 9,711,643
- Issue date Jul 18, 2017
- Texas Instruments Incorporated
- Aravind C. Appaswamy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mutual ballasting multi-finger bidirectional ESD device
- Patent number 9,633,991
- Issue date Apr 25, 2017
- Texas Instruments Incorporated
- Akram A. Salman
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Packaged device for detecting factory ESD events
- Patent number 9,629,294
- Issue date Apr 18, 2017
- Texas Instruments Incorporated
- John Eric Kunz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for designing diodes
- Patent number 9,418,197
- Issue date Aug 16, 2016
- Texas Instruments Incorporated
- Farzan Farbiz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mutual ballasting multi-finger bidirectional ESD device
- Patent number 9,224,724
- Issue date Dec 29, 2015
- Texas Instruments Incorporated
- Akram A. Salman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Twin-well lateral silicon controlled rectifier
- Patent number 9,035,352
- Issue date May 19, 2015
- Texas Instruments Incorporated
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ESD protection validator, an ESD validation system and a method of...
- Patent number 8,589,839
- Issue date Nov 19, 2013
- Texas Instruments Incorporated
- Gianluca Boselli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MOS device with substrate potential elevation for ESD protection
- Patent number 8,530,301
- Issue date Sep 10, 2013
- Texas Instruments Incorporated
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System, an apparatus and a method for performing chip-level electro...
- Patent number 8,306,804
- Issue date Nov 6, 2012
- Texas Instruments Incorporated
- Gianluca Boselli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of optimizing ESD protection for an IC, an ESD protection op...
- Patent number 8,176,460
- Issue date May 8, 2012
- Texas Instruments Incorporated
- Gianluca Boselli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MOS device with substrate potential elevation
- Patent number 7,838,924
- Issue date Nov 23, 2010
- Texas Instruments Incorporated
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low capacitance SCR with trigger element
- Patent number 7,728,349
- Issue date Jun 1, 2010
- Texas Instruments Incorporated
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local ESD protection for low-capicitance applications
- Patent number 7,667,243
- Issue date Feb 23, 2010
- Texas Instruments Incorporated
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor dual guardring arrangement
- Patent number 7,348,643
- Issue date Mar 25, 2008
- Texas Instruments Incorporated
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Guardwall structures for ESD protection
- Patent number 7,282,767
- Issue date Oct 16, 2007
- Texas Instruments Incorporated
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local ESD protection for low-capacitance applications
- Patent number 7,277,263
- Issue date Oct 2, 2007
- Texas Instruments Incorporated
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Body-biased pMOS protection against electrostatic discharge
- Patent number 7,256,460
- Issue date Aug 14, 2007
- Texas Instruments Incorporated
- Craig T. Salling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMOS electrostatic discharge (ESD) protection device
- Patent number 7,196,887
- Issue date Mar 27, 2007
- Texas Instruments Incorporated
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Guardwall structures for ESD protection
- Patent number 7,145,204
- Issue date Dec 5, 2006
- Texas Instruments Incorporated
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient pMOS ESD protection circuit
- Patent number 6,963,111
- Issue date Nov 8, 2005
- Texas Instruments Incorporated
- Vijay K. Reddy
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ELECTROSTATIC DISCHARGE DEVICES
- Publication number 20180366460
- Publication date Dec 20, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca BOSELLI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROSTATIC DISCHARGE DEVICE
- Publication number 20170288058
- Publication date Oct 5, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Aravind C. Appaswamy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR DESIGNING DIODES
- Publication number 20160224716
- Publication date Aug 4, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Farzan Farbiz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MUTUAL BALLASTING MULTI-FINGER BIDIRECTIONAL ESD DEVICE
- Publication number 20160086936
- Publication date Mar 24, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Akram A. SALMAN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ESD ROBUST MOS DEVICE
- Publication number 20150146330
- Publication date May 28, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Aravind C. Appaswamy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED DEVICE FOR DETECTING FACTORY ESD EVENTS
- Publication number 20140184237
- Publication date Jul 3, 2014
- John Eric KUNZ
- G01 - MEASURING TESTING
Information Patent Application
MUTUAL BALLASTING MULTI-FINGER BIDIRECTIONAL ESD DEVICE
- Publication number 20130320396
- Publication date Dec 5, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Akram A. SALMAN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ESD PROTECTION CIRCUIT PROVIDING MULTIPLE PROTECTION LEVELS
- Publication number 20130285196
- Publication date Oct 31, 2013
- TEXAS INSTRUMENTS INCORPORATED
- MARIANO DISSEGNA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TWIN-WELL LATERAL SILICON CONTROLLED RECTIFIER
- Publication number 20130285114
- Publication date Oct 31, 2013
- TEXAS INSTRUMENTS INCORPORATED
- GIANLUCA BOSELLI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRAIN EXTENDED MOS TRANSISTOR HAVING SELECTIVELY SILICIDED DRAIN
- Publication number 20130264640
- Publication date Oct 10, 2013
- TEXAS INSTRUMENTS INCORPORATED
- AKRAM A. SALMAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS DEVICE WITH SUBSTRATE POTENTIAL ELEVATION FOR ESD PROTECTION
- Publication number 20110063765
- Publication date Mar 17, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF OPTIMIZING ESD PROTECTION FOR AN IC, AN ESD PROTECTION OP...
- Publication number 20100169845
- Publication date Jul 1, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca Boselli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, AN APPARATUS AND A METHOD FOR PERFORMING CHIP-LEVEL ELECTRO...
- Publication number 20100169064
- Publication date Jul 1, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca Boselli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ESD PROTECTION VALIDATOR, AN ESD VALIDATION SYSTEM AND A METHOD OF...
- Publication number 20100169854
- Publication date Jul 1, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca Boselli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MOS COMPRISING SUBSTRATE POTENTIAL ELEVATING CIRCUITRY FOR ESD PROT...
- Publication number 20090267154
- Publication date Oct 29, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Local ESD Protection for Low-Capicitance Applications
- Publication number 20070284666
- Publication date Dec 13, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor dual guardring arrangement
- Publication number 20070278581
- Publication date Dec 6, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low capacitance SCR with trigger element
- Publication number 20070090392
- Publication date Apr 26, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Gianluca Boselli
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and systems for determining efficacy of stress protection c...
- Publication number 20060274473
- Publication date Dec 7, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Vijay Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Application
GUARDWALL STRUCTURES FOR ESD PROTECTION
- Publication number 20060231897
- Publication date Oct 19, 2006
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Guardwall structures for ESD protection
- Publication number 20060231895
- Publication date Oct 19, 2006
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Body-biased pMOS protection against electrostatic discharge
- Publication number 20060113600
- Publication date Jun 1, 2006
- Craig T. Salling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Local ESD protection for low-capacitance applications
- Publication number 20060050453
- Publication date Mar 9, 2006
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Efficient pMOS ESD protection circuit
- Publication number 20040251502
- Publication date Dec 16, 2004
- Vijay K. Reddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PMOS electrostatic discharge (ESD) protection device
- Publication number 20040240128
- Publication date Dec 2, 2004
- Gianluca Boselli
- H01 - BASIC ELECTRIC ELEMENTS

Gianluca Boselli

Person

Patents Grantslast 30 patents

Electrostatic discharge devices

Electrostatic discharge device

ESD robust MOS device

Mutual ballasting multi-finger bidirectional ESD device

Packaged device for detecting factory ESD events

Method for designing diodes

Mutual ballasting multi-finger bidirectional ESD device

Twin-well lateral silicon controlled rectifier

ESD protection validator, an ESD validation system and a method of...

MOS device with substrate potential elevation for ESD protection

System, an apparatus and a method for performing chip-level electro...

Method of optimizing ESD protection for an IC, an ESD protection op...

MOS device with substrate potential elevation

Low capacitance SCR with trigger element

Local ESD protection for low-capicitance applications

Semiconductor dual guardring arrangement

Guardwall structures for ESD protection

Local ESD protection for low-capacitance applications

Body-biased pMOS protection against electrostatic discharge

PMOS electrostatic discharge (ESD) protection device

Guardwall structures for ESD protection

Efficient pMOS ESD protection circuit

Patents Applicationslast 30 patents

ELECTROSTATIC DISCHARGE DEVICES

ELECTROSTATIC DISCHARGE DEVICE

METHOD FOR DESIGNING DIODES

MUTUAL BALLASTING MULTI-FINGER BIDIRECTIONAL ESD DEVICE

ESD ROBUST MOS DEVICE

PACKAGED DEVICE FOR DETECTING FACTORY ESD EVENTS

MUTUAL BALLASTING MULTI-FINGER BIDIRECTIONAL ESD DEVICE

ESD PROTECTION CIRCUIT PROVIDING MULTIPLE PROTECTION LEVELS

TWIN-WELL LATERAL SILICON CONTROLLED RECTIFIER

DRAIN EXTENDED MOS TRANSISTOR HAVING SELECTIVELY SILICIDED DRAIN

MOS DEVICE WITH SUBSTRATE POTENTIAL ELEVATION FOR ESD PROTECTION

METHOD OF OPTIMIZING ESD PROTECTION FOR AN IC, AN ESD PROTECTION OP...

SYSTEM, AN APPARATUS AND A METHOD FOR PERFORMING CHIP-LEVEL ELECTRO...

ESD PROTECTION VALIDATOR, AN ESD VALIDATION SYSTEM AND A METHOD OF...

MOS COMPRISING SUBSTRATE POTENTIAL ELEVATING CIRCUITRY FOR ESD PROT...

Local ESD Protection for Low-Capicitance Applications

Semiconductor dual guardring arrangement

Low capacitance SCR with trigger element

Methods and systems for determining efficacy of stress protection c...

GUARDWALL STRUCTURES FOR ESD PROTECTION

Guardwall structures for ESD protection

Body-biased pMOS protection against electrostatic discharge

Local ESD protection for low-capacitance applications

Efficient pMOS ESD protection circuit

PMOS electrostatic discharge (ESD) protection device