Gilbert Dewey

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Gate-to-gate isolation for stacked transistor architecture via sele...
- Patent number 12,369,399
- Issue date Jul 22, 2025
- Intel Corporation
- Willy Rachmady
Information Patent Grant
Transistor structures with a metal oxide contact buffer and a metho...
- Patent number 12,349,416
- Issue date Jul 1, 2025
- Intel Corporation
- Gilbert Dewey
Information Patent Grant
Contact resistance reduction in transistor devices with metallizati...
- Patent number 12,342,574
- Issue date Jun 24, 2025
- Intel Corporation
- Koustav Ganguly
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low resistance and reduced reactivity approaches for fabricating co...
- Patent number 12,328,927
- Issue date Jun 10, 2025
- Intel Coporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with isolation below source and drain
- Patent number 12,288,803
- Issue date Apr 29, 2025
- Intel Corporation
- Willy Rachmady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sideways vias in isolation areas to contact interior layers in stac...
- Patent number 12,255,137
- Issue date Mar 18, 2025
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming an oxide volume within a fin
- Patent number 12,224,202
- Issue date Feb 11, 2025
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual gate control for trench shaped thin film transistors
- Patent number 12,191,395
- Issue date Jan 7, 2025
- Intel Corporation
- Abhishek A. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin-film transistors and MIM capacitors in exclusion zones
- Patent number 12,183,668
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek A. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ribbon or wire transistor stack with selective dipole threshold vol...
- Patent number 12,183,739
- Issue date Dec 31, 2024
- Intel Corporation
- Nicole Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contacts for thin film transistors
- Patent number 12,183,831
- Issue date Dec 31, 2024
- Intel Corporation
- Van H. Le
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual contact process with stacked metal layers
- Patent number 12,170,319
- Issue date Dec 17, 2024
- Intel Corporation
- Kevin Cook
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked source-drain-gate connection and process for forming such
- Patent number 12,148,806
- Issue date Nov 19, 2024
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor including wrap around source and drain contacts
- Patent number 12,142,689
- Issue date Nov 12, 2024
- Intel Corporation
- Sean Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film transistors having double gates
- Patent number 12,125,917
- Issue date Oct 22, 2024
- Intel Corporation
- Abhishek A. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low resistance approaches for fabricating contacts and the resultin...
- Patent number 12,119,387
- Issue date Oct 15, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer crystalline back gated thin film transistor
- Patent number 12,119,409
- Issue date Oct 15, 2024
- Intel Corporation
- Van H. Le
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Arrays of double-sided dram cells including capacitors on the front...
- Patent number 12,120,865
- Issue date Oct 15, 2024
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect techniques for electrically connecting source/drain re...
- Patent number 12,107,085
- Issue date Oct 1, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked-substrate FPGA semiconductor devices
- Patent number 12,087,750
- Issue date Sep 10, 2024
- Intel Corporation
- Abhishek A. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Backside contacts for semiconductor devices
- Patent number 12,080,605
- Issue date Sep 3, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance semiconductor oxide material channel regions for NMOS
- Patent number 12,068,319
- Issue date Aug 20, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation wall stressor structures to improve channel stress and th...
- Patent number 12,033,896
- Issue date Jul 9, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial layer with substantially parallel sides
- Patent number 12,020,929
- Issue date Jun 25, 2024
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-dielectric gate stack for crystalline thin film transistors
- Patent number 12,009,433
- Issue date Jun 11, 2024
- Intel Corporation
- Van H. Le
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leave-behind protective layer having secondary purpose
- Patent number 11,996,408
- Issue date May 28, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film transistors with spacer controlled gate length
- Patent number 11,997,847
- Issue date May 28, 2024
- Intel Corporation
- Abhishek A. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistors with gate electrode self-aligned to semico...
- Patent number 11,996,447
- Issue date May 28, 2024
- Intel Corporation
- Sean T. Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked forksheet transistors
- Patent number 11,996,411
- Issue date May 28, 2024
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional integrated circuits (3DICs) including bottom gate...
- Patent number 11,996,404
- Issue date May 28, 2024
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...
- Publication number 20250227956
- Publication date Jul 10, 2025
- Intel Corporation
- Koustav GANGULY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE/DRAIN CONTACT TRENCH WITH DIELECTRIC LINER ON CONTACT METAL
- Publication number 20250220958
- Publication date Jul 3, 2025
- Intel Corporation
- Gilbert Dewey
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH ASYMMETRIC EPITAXIAL SOURCE OR DR...
- Publication number 20250220978
- Publication date Jul 3, 2025
- Intel Corporation
- Gilbert DEWEY
Information Patent Application
TRANSISTORS WITH ASYMMETRIC SOURCE AND DRAIN CONTACTS
- Publication number 20250220950
- Publication date Jul 3, 2025
- Intel Corpration
- Gilbert Dewey
Information Patent Application
INCORPORATION OF SEMICONDUCTOR DOPING MATERIALS IN METAL CONTACTS V...
- Publication number 20250212441
- Publication date Jun 26, 2025
- Intel Corporation
- I-Cheng Tung
Information Patent Application
CAPPING NANORIBBON FINS IN SUPERLATTICE STRUCTURES DURING FABRICATION
- Publication number 20250212522
- Publication date Jun 26, 2025
- Intel Corporation
- Cheng-Ying Huang
Information Patent Application
CMOS METAL CONTACTS WITH DOPANT DIFFUSION BARRIERS
- Publication number 20250212507
- Publication date Jun 26, 2025
- Intel Corporation
- Gilbert Dewey
Information Patent Application
RIBBON OR WIRE TRANSISTOR STACK WITH SELECTIVE DIPOLE THRESHOLD VOL...
- Publication number 20250133822
- Publication date Apr 24, 2025
- Intel Corporation
- Nicole Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH DIFFERENTIATED SOURCE OR DRAIN ST...
- Publication number 20250107183
- Publication date Mar 27, 2025
- Intel Corporation
- Leonard P. GULER
Information Patent Application
ARRAYS OF DOUBLE-SIDED DRAM CELLS INCLUDING CAPACITORS ON THE FRONT...
- Publication number 20250031362
- Publication date Jan 23, 2025
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED MEMORY CELL WITH REPLACEMENT METAL GATE VERTICAL ACCES...
- Publication number 20250008740
- Publication date Jan 2, 2025
- Intel Corporation
- Wriddhi Chakraborty
Information Patent Application
BACKSIDE CONTACTS FOR SEMICONDUCTOR DEVICES
- Publication number 20240371700
- Publication date Nov 7, 2024
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...
- Publication number 20240347610
- Publication date Oct 17, 2024
- Intel Corporation
- Koustav GANGULY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED FORKSHEET TRANSISTORS
- Publication number 20240234422
- Publication date Jul 11, 2024
- Intel Corporation
- Cheng-Ying HUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPUTTER TARGETS FOR SELF-DOPED SOURCE AND DRAIN CONTACTS
- Publication number 20240186127
- Publication date Jun 6, 2024
- Intel Corporation
- Ilya V. Karpov
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STAC...
- Publication number 20240162141
- Publication date May 16, 2024
- Intel Corporation
- Ehren MANNEBACH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SOURCE-DRAIN-GATE CONNECTION AND PROCESS FOR FORMING SUCH
- Publication number 20240145557
- Publication date May 2, 2024
- Intel Corporation
- Ehren MANNEBACH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TOP GATE RECESSED CHANNEL CMOS THIN FILM TRANSISTOR AND METHODS OF...
- Publication number 20240136277
- Publication date Apr 25, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH ISOLATION BELOW SOURCE AND DRAIN
- Publication number 20240113161
- Publication date Apr 4, 2024
- Intel Corporation
- Willy Rachmady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR STRUCTURES WITH A METAL OXIDE CONTACT BUFFER AND A METHO...
- Publication number 20240105854
- Publication date Mar 28, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TOP-GATE DOPED THIN FILM TRANSISTOR
- Publication number 20240105852
- Publication date Mar 28, 2024
- Intel Corporation
- Abhishek A. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICES WITH CONTACTS USING NITRIDIZED MOLYBDENUM
- Publication number 20240105508
- Publication date Mar 28, 2024
- Intel Corporation
- Jitendra Kumar Jha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL GATE CONTROL FOR TRENCH SHAPED THIN FILM TRANSISTORS
- Publication number 20240055531
- Publication date Feb 15, 2024
- Intel Corporation
- Abhishek A. Sharma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...
- Publication number 20240047559
- Publication date Feb 8, 2024
- Intel Corporation
- Willy RACHMADY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH PHOSPHIDE OR ARSE...
- Publication number 20240006506
- Publication date Jan 4, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH BORIDE, INDIUM, O...
- Publication number 20240006533
- Publication date Jan 4, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAPPING SOURCE AND DRAIN REGIONS OF TRANSISTORS TO PREVENT DIFFUSIO...
- Publication number 20240006488
- Publication date Jan 4, 2024
- Intel Corporation
- Nazila Haratipour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE AND DRAIN REFRACTORY METAL CAP
- Publication number 20240006494
- Publication date Jan 4, 2024
- Intel Corporation
- Nazila Haratipour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGE:GAB SOURCE OR DRAIN STRUCTURES WITH LOW RESISTIVITY
- Publication number 20230420456
- Publication date Dec 28, 2023
- Intel Corporation
- Debaleena NANDI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOWER DEVICE ACCESS IN STACKED TRANSISTOR DEVICES
- Publication number 20230420460
- Publication date Dec 28, 2023
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS

Gilbert Dewey

Person

Patents Grantslast 30 patents

Gate-to-gate isolation for stacked transistor architecture via sele...

Transistor structures with a metal oxide contact buffer and a metho...

Contact resistance reduction in transistor devices with metallizati...

Low resistance and reduced reactivity approaches for fabricating co...

Transistor with isolation below source and drain

Sideways vias in isolation areas to contact interior layers in stac...

Forming an oxide volume within a fin

Dual gate control for trench shaped thin film transistors

Thin-film transistors and MIM capacitors in exclusion zones

Ribbon or wire transistor stack with selective dipole threshold vol...

Self-aligned contacts for thin film transistors

Dual contact process with stacked metal layers

Stacked source-drain-gate connection and process for forming such

Transistor including wrap around source and drain contacts

Thin film transistors having double gates

Low resistance approaches for fabricating contacts and the resultin...

Multi-layer crystalline back gated thin film transistor

Arrays of double-sided dram cells including capacitors on the front...

Interconnect techniques for electrically connecting source/drain re...

Stacked-substrate FPGA semiconductor devices

Backside contacts for semiconductor devices

High performance semiconductor oxide material channel regions for NMOS

Isolation wall stressor structures to improve channel stress and th...

Epitaxial layer with substantially parallel sides

Multi-dielectric gate stack for crystalline thin film transistors

Leave-behind protective layer having secondary purpose

Thin film transistors with spacer controlled gate length

Field effect transistors with gate electrode self-aligned to semico...

Stacked forksheet transistors

Three-dimensional integrated circuits (3DICs) including bottom gate...

Patents Applicationslast 30 patents

CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...

SOURCE/DRAIN CONTACT TRENCH WITH DIELECTRIC LINER ON CONTACT METAL

INTEGRATED CIRCUIT STRUCTURE WITH ASYMMETRIC EPITAXIAL SOURCE OR DR...

TRANSISTORS WITH ASYMMETRIC SOURCE AND DRAIN CONTACTS

INCORPORATION OF SEMICONDUCTOR DOPING MATERIALS IN METAL CONTACTS V...

CAPPING NANORIBBON FINS IN SUPERLATTICE STRUCTURES DURING FABRICATION

CMOS METAL CONTACTS WITH DOPANT DIFFUSION BARRIERS

RIBBON OR WIRE TRANSISTOR STACK WITH SELECTIVE DIPOLE THRESHOLD VOL...

INTEGRATED CIRCUIT STRUCTURE WITH DIFFERENTIATED SOURCE OR DRAIN ST...

ARRAYS OF DOUBLE-SIDED DRAM CELLS INCLUDING CAPACITORS ON THE FRONT...

SELF-ALIGNED MEMORY CELL WITH REPLACEMENT METAL GATE VERTICAL ACCES...

BACKSIDE CONTACTS FOR SEMICONDUCTOR DEVICES

CONTACT RESISTANCE REDUCTION IN TRANSISTOR DEVICES WITH METALLIZATI...

STACKED FORKSHEET TRANSISTORS

SPUTTER TARGETS FOR SELF-DOPED SOURCE AND DRAIN CONTACTS

SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STAC...

STACKED SOURCE-DRAIN-GATE CONNECTION AND PROCESS FOR FORMING SUCH

TOP GATE RECESSED CHANNEL CMOS THIN FILM TRANSISTOR AND METHODS OF...

TRANSISTOR WITH ISOLATION BELOW SOURCE AND DRAIN

TRANSISTOR STRUCTURES WITH A METAL OXIDE CONTACT BUFFER AND A METHO...

TOP-GATE DOPED THIN FILM TRANSISTOR

INTEGRATED CIRCUIT DEVICES WITH CONTACTS USING NITRIDIZED MOLYBDENUM

DUAL GATE CONTROL FOR TRENCH SHAPED THIN FILM TRANSISTORS

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...

LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH PHOSPHIDE OR ARSE...

LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH BORIDE, INDIUM, O...

CAPPING SOURCE AND DRAIN REGIONS OF TRANSISTORS TO PREVENT DIFFUSIO...

SOURCE AND DRAIN REFRACTORY METAL CAP

SIGE:GAB SOURCE OR DRAIN STRUCTURES WITH LOW RESISTIVITY

LOWER DEVICE ACCESS IN STACKED TRANSISTOR DEVICES