Glenn Austin Baxter

Person

Longmont, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Computing system with network attached processors
- Patent number 8,885,334
- Issue date Nov 11, 2014
- Xilinx, Inc.
- Glenn A. Baxter
- G11 - INFORMATION STORAGE
Information Patent Grant
Graphical user interface (GUI) including input files with informati...
- Patent number 8,479,124
- Issue date Jul 2, 2013
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage system with removable memory module having parallel ch...
- Patent number 8,134,875
- Issue date Mar 13, 2012
- Xilinx, Inc.
- Glenn A. Baxter
- G11 - INFORMATION STORAGE
Information Patent Grant
Port interface modules (PIMs) in a multi-port memory controller (MPMC)
- Patent number 7,913,022
- Issue date Mar 22, 2011
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accessing user registers in an integrated circuit
- Patent number 7,830,172
- Issue date Nov 9, 2010
- Xilinx, Inc.
- Glenn A. Baxter
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Performance monitors (PMs) for measuring performance in a system an...
- Patent number 7,720,636
- Issue date May 18, 2010
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self aligning state machine
- Patent number 7,711,907
- Issue date May 4, 2010
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer using the configuration port of a programmable logic...
- Patent number 7,636,802
- Issue date Dec 22, 2009
- Xilinx, Inc.
- Glenn A. Baxter
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for communicating data between a network trans...
- Patent number 7,424,553
- Issue date Sep 9, 2008
- Xilinx, Inc.
- Christopher J. Borrelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device including programmable interface core and...
- Patent number 7,406,557
- Issue date Jul 29, 2008
- Xilinx, Inc.
- Khang Kim Dao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device including programmable interface core and...
- Patent number 7,266,632
- Issue date Sep 4, 2007
- Xilinx, Inc.
- Khang Kim Dao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling access to memory circuitry
- Patent number 7,260,688
- Issue date Aug 21, 2007
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling direct access to memory circuitry
- Patent number 7,225,278
- Issue date May 29, 2007
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device including programmable interface core and...
- Patent number 7,076,595
- Issue date Jul 11, 2006
- Xilinx, Inc.
- Khang Kim Dao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device structures in standard cell devices
- Patent number 7,005,888
- Issue date Feb 28, 2006
- Xilinx, Inc.
- Glenn A. Baxter
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for timing management in a converted design
- Patent number 6,872,601
- Issue date Mar 29, 2005
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device structures in standard cell devices
- Patent number 6,809,549
- Issue date Oct 26, 2004
- Xilinx, Inc.
- Glenn A. Baxter
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for controlling timing in reduced programmable logic devices
- Patent number 6,675,309
- Issue date Jan 6, 2004
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for managing database models for reduced programmable logic...
- Patent number 6,629,308
- Issue date Sep 30, 2003
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for timing management in a converted design
- Patent number 6,625,787
- Issue date Sep 23, 2003
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for improving area in reduced programmable logic devices
- Patent number 6,526,563
- Issue date Feb 25, 2003
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device structures in standard cell devices
- Patent number 6,515,509
- Issue date Feb 4, 2003
- Xilinx, Inc.
- Glenn A. Baxter
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for converting programmable logic devices into standard cell...
- Patent number 6,490,707
- Issue date Dec 3, 2002
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intelligent direct memory access controller providing controlwise a...
- Patent number 6,370,601
- Issue date Apr 9, 2002
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardwire logic device emulating any of two or more FPGAs
- Patent number 6,353,921
- Issue date Mar 5, 2002
- Xilinx, Inc.
- Edwin S. Law
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Place-holding library elements for defining routing paths
- Patent number 6,308,309
- Issue date Oct 23, 2001
- Xilinx, Inc.
- Andy H. Gan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable IC with gate array core and boundary scan capability
- Patent number 6,226,779
- Issue date May 1, 2001
- Xilinx, Inc.
- Glenn A. Baxter
- G01 - MEASURING TESTING
Information Patent Grant
Method for providing specific knowledge of a structure of parameter...
- Patent number 6,202,106
- Issue date Mar 13, 2001
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of implementing a boundary scan chain
- Patent number 6,134,517
- Issue date Oct 17, 2000
- Xilinx, Inc.
- Glenn A. Baxter
- G01 - MEASURING TESTING
Information Patent Grant
Hardwire logic device emulating an FPGA
- Patent number 6,120,551
- Issue date Sep 19, 2000
- Xilinx, Inc.
- Edwin S. Law
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Directly Coupled Computing, Storage and Network Elements With Local...
- Publication number 20150149691
- Publication date May 28, 2015
- Glenn Austin Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus, method and system for motion recording of a remote devic...
- Publication number 20150062440
- Publication date Mar 5, 2015
- Glenn Austin Baxter
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA STORAGE SYSTEM WITH REMOVABLE MEMORY MODULE HAVING PARALLEL CH...
- Publication number 20100142243
- Publication date Jun 10, 2010
- Xilinx, Inc.
- Glenn A. Baxter
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable logic device including programmable interface core and...
- Publication number 20070255886
- Publication date Nov 1, 2007
- Xilinx, Inc.
- Khang Kim Dao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic device including programmable interface core and...
- Publication number 20060236018
- Publication date Oct 19, 2006
- Xilinx, Inc.
- Khang Kim Dao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for timing management in a converted design
- Publication number 20040021490
- Publication date Feb 5, 2004
- Xilinx, Inc.
- Glenn A. Baxter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic device structures in standard cell devices
- Publication number 20030080777
- Publication date May 1, 2003
- Xilinx, Inc.
- Glenn A. Baxter
- H03 - BASIC ELECTRONIC CIRCUITRY

Glenn Austin Baxter

Person

Patents Grantslast 30 patents

Computing system with network attached processors

Graphical user interface (GUI) including input files with informati...

Data storage system with removable memory module having parallel ch...

Port interface modules (PIMs) in a multi-port memory controller (MPMC)

Accessing user registers in an integrated circuit

Performance monitors (PMs) for measuring performance in a system an...

Self aligning state machine

Data transfer using the configuration port of a programmable logic...

Method and apparatus for communicating data between a network trans...

Programmable logic device including programmable interface core and...

Programmable logic device including programmable interface core and...

Method and apparatus for controlling access to memory circuitry

Method and apparatus for controlling direct access to memory circuitry

Programmable logic device including programmable interface core and...

Programmable logic device structures in standard cell devices

Method and apparatus for timing management in a converted design

Programmable logic device structures in standard cell devices

Method for controlling timing in reduced programmable logic devices

Method for managing database models for reduced programmable logic...

Method and apparatus for timing management in a converted design

Method for improving area in reduced programmable logic devices

Programmable logic device structures in standard cell devices

Method for converting programmable logic devices into standard cell...

Intelligent direct memory access controller providing controlwise a...

Hardwire logic device emulating any of two or more FPGAs

Place-holding library elements for defining routing paths

Programmable IC with gate array core and boundary scan capability

Method for providing specific knowledge of a structure of parameter...

Method of implementing a boundary scan chain

Hardwire logic device emulating an FPGA

Patents Applicationslast 30 patents

Directly Coupled Computing, Storage and Network Elements With Local...

Apparatus, method and system for motion recording of a remote devic...

DATA STORAGE SYSTEM WITH REMOVABLE MEMORY MODULE HAVING PARALLEL CH...

Programmable logic device including programmable interface core and...

Programmable logic device including programmable interface core and...

Method and apparatus for timing management in a converted design

Programmable logic device structures in standard cell devices