Gopal Raghavan

Person

Thousand Oaks, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-timed processors implemented with multi-rail null convention l...
- Patent number 10,951,212
- Issue date Mar 16, 2021
- Eta Compute, Inc.
- Chao Xu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-timed clocked processor architecture
- Patent number 10,732,700
- Issue date Aug 4, 2020
- Eta Compute, Inc.
- Paul Murtagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real time clock with neural network correction of temperature-based...
- Patent number 10,666,268
- Issue date May 26, 2020
- Eta Compute, Inc.
- Gopal Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous processor
- Patent number 10,248,187
- Issue date Apr 2, 2019
- Eta Compute, Inc.
- Gopal Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-timed processors implemented with multi-rail null convention l...
- Patent number 10,205,453
- Issue date Feb 12, 2019
- Eta Compute, Inc.
- Chao Xu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous processor that adjusts a respective operating voltage...
- Patent number 9,423,866
- Issue date Aug 23, 2016
- Eta Compute, Inc.
- Gopal Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redriven/retimed registered dual inline memory module
- Patent number 8,898,368
- Issue date Nov 25, 2014
- Inphi Corporation
- Christopher Haywood
- G11 - INFORMATION STORAGE
Information Patent Grant
Load reduction system and method for DIMM-based memory systems
- Patent number 8,275,936
- Issue date Sep 25, 2012
- Inphi Corporation
- Christopher Haywood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output buffer with switchable output impedance
- Patent number 7,479,799
- Issue date Jan 20, 2009
- Inphi Corporation
- Gopal Raghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Master-slave flip-flop and clocking scheme
- Patent number 7,408,393
- Issue date Aug 5, 2008
- Inphi Corporation
- Dhruv Jain
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable strength output buffer for RDIMM address register
- Patent number 7,307,863
- Issue date Dec 11, 2007
- Inphi Corporation
- Jeffrey C. Yen
- G11 - INFORMATION STORAGE
Information Patent Grant
Output buffer with time varying source impedance for driving capaci...
- Patent number 6,980,021
- Issue date Dec 27, 2005
- Inphi Corporation
- Nikhil K. Srivastava
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bipolar transistor-based linearizer with programmable gain and phas...
- Patent number 6,750,709
- Issue date Jun 15, 2004
- The Boeing Company
- Gopal Raghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Variable negative resistance cell for bipolar integrated circuits
- Patent number 6,621,331
- Issue date Sep 16, 2003
- HRL Laboratories, LLC
- Carl W. Pobanz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-bit ΔΣ modulator having linear output
- Patent number 6,441,759
- Issue date Aug 27, 2002
- HRL Laboratories, LLC
- Gopal Raghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple mode analog-to-digital converter employing a single quantizer
- Patent number 6,362,762
- Issue date Mar 26, 2002
- HRL Laboratories, LLC
- Henrik T. Jensen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method to increase frequency of digital circuits
- Patent number 6,288,579
- Issue date Sep 11, 2001
- HRL Laboratories, LLC
- Gopal Raghavan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
REAL TIME CLOCK WITH NEURAL NETWORK CORRECTION OF TEMPERATURE-BASED...
- Publication number 20200052704
- Publication date Feb 13, 2020
- Eta Compute, Inc.
- Gopal Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK FOR CONTINUOUS SPEECH SEGMENTATION AND RECOGNITION
- Publication number 20190325862
- Publication date Oct 24, 2019
- Eta Compute, Inc.
- Hari Shankar
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Application
SELF-TIMED CLOCKED PROCESSOR ARCHITECTURE
- Publication number 20190196564
- Publication date Jun 27, 2019
- Eta Compute, Inc.
- Paul Murtagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-TIMED PROCESSORS IMPLEMENTED WITH MULTI-RAIL NULL CONVENTION L...
- Publication number 20190190520
- Publication date Jun 20, 2019
- Eta Compute, Inc.
- Chao Xu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SELF-TIMED PROCESSORS IMPLEMENTED WITH MULTI-RAIL NULL CONVENTION L...
- Publication number 20180294810
- Publication date Oct 11, 2018
- Eta Compute, Inc.
- Chao Xu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ASYNCHRONOUS PROCESSOR
- Publication number 20160328011
- Publication date Nov 10, 2016
- Eta Compute, Inc.
- Gopal Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS PROCESSOR
- Publication number 20160018869
- Publication date Jan 21, 2016
- Gopal Raghavan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE AND MEMORY SYSTEM HAVING THE SAME
- Publication number 20140355327
- Publication date Dec 4, 2014
- Samsung Electronics Co., Ltd.
- Hyun Il BYUN
- G11 - INFORMATION STORAGE
Information Patent Application
Redriven/Retimed Registered Dual Inline Memory Module
- Publication number 20090119451
- Publication date May 7, 2009
- Christopher Haywood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Output buffer with switchable output impedance
- Publication number 20070216445
- Publication date Sep 20, 2007
- INPHI CORPORATION
- Gopal Raghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable strength output buffer for RDIMM address register
- Publication number 20070030752
- Publication date Feb 8, 2007
- INPHI CORPORATION
- Jeffrey C. Yen
- G11 - INFORMATION STORAGE
Information Patent Application
OUTPUT BUFFER WITH TIME VARYING SOURCE IMPEDANCE FOR DRIVING CAPACI...
- Publication number 20050280435
- Publication date Dec 22, 2005
- INPHI CORPORATION
- Nikhil K. Srivastava
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Symmetric planar inductor
- Publication number 20050077992
- Publication date Apr 14, 2005
- Gopal Raghavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bipolar transistor-based linearizer with programmable gain and phas...
- Publication number 20030102911
- Publication date Jun 5, 2003
- Gopal Raghavan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Variable negative resistance cell for bipolar integrated circuits
- Publication number 20030030485
- Publication date Feb 13, 2003
- Carl W. Pobanz
- H03 - BASIC ELECTRONIC CIRCUITRY

Gopal Raghavan

Person

Patents Grantslast 30 patents

Self-timed processors implemented with multi-rail null convention l...

Self-timed clocked processor architecture

Real time clock with neural network correction of temperature-based...

Asynchronous processor

Self-timed processors implemented with multi-rail null convention l...

Asynchronous processor that adjusts a respective operating voltage...

Redriven/retimed registered dual inline memory module

Load reduction system and method for DIMM-based memory systems

Output buffer with switchable output impedance

Master-slave flip-flop and clocking scheme

Programmable strength output buffer for RDIMM address register

Output buffer with time varying source impedance for driving capaci...

Bipolar transistor-based linearizer with programmable gain and phas...

Variable negative resistance cell for bipolar integrated circuits

Multi-bit &#x0394;&#x03A3; modulator having linear output

Multiple mode analog-to-digital converter employing a single quantizer

Method to increase frequency of digital circuits

Patents Applicationslast 30 patents

REAL TIME CLOCK WITH NEURAL NETWORK CORRECTION OF TEMPERATURE-BASED...

NEURAL NETWORK FOR CONTINUOUS SPEECH SEGMENTATION AND RECOGNITION

SELF-TIMED CLOCKED PROCESSOR ARCHITECTURE

SELF-TIMED PROCESSORS IMPLEMENTED WITH MULTI-RAIL NULL CONVENTION L...

SELF-TIMED PROCESSORS IMPLEMENTED WITH MULTI-RAIL NULL CONVENTION L...

ASYNCHRONOUS PROCESSOR

ASYNCHRONOUS PROCESSOR

MEMORY MODULE AND MEMORY SYSTEM HAVING THE SAME

Redriven/Retimed Registered Dual Inline Memory Module

Output buffer with switchable output impedance

Programmable strength output buffer for RDIMM address register

OUTPUT BUFFER WITH TIME VARYING SOURCE IMPEDANCE FOR DRIVING CAPACI...

Symmetric planar inductor

Bipolar transistor-based linearizer with programmable gain and phas...

Variable negative resistance cell for bipolar integrated circuits

Multi-bit ΔΣ modulator having linear output