Gregory Costrini

Person

Hopewell Junction, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-level isolation structure
- Patent number 11,158,633
- Issue date Oct 26, 2021
- GLOBALFOUNDRIES U.S. INC.
- Haiting Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method to prevent EPI short between trenches in FinFE...
- Patent number 10,177,154
- Issue date Jan 8, 2019
- International Business Machines Corporation
- Michael V. Aquilino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method to prevent EPI short between trenches in FINFE...
- Patent number 9,818,741
- Issue date Nov 14, 2017
- International Business Machines Corporation
- Michael V. Aquilino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protection of semiconductor-oxide-containing gate dielectric during...
- Patent number 9,577,068
- Issue date Feb 21, 2017
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protection of semiconductor-oxide-containing gate dielectric during...
- Patent number 9,431,395
- Issue date Aug 30, 2016
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically conductive path forming below barrier oxide layer and...
- Patent number 8,563,398
- Issue date Oct 22, 2013
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive spacers for semiconductor devices and methods of forming
- Patent number 8,039,888
- Issue date Oct 18, 2011
- International Business Machines Corporation
- Gary Bela Bronner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating contacts to pillar structures in integrated...
- Patent number 8,008,095
- Issue date Aug 30, 2011
- International Business Machines Corporation
- Solomon Assefa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically conductive path forming below barrier oxide layer and...
- Patent number 7,923,840
- Issue date Apr 12, 2011
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for self-aligned device contacts
- Patent number 7,884,396
- Issue date Feb 8, 2011
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for self-aligned device contacts
- Patent number 7,875,550
- Issue date Jan 25, 2011
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for non-selective shallow trench isolation reactive ion etch...
- Patent number 7,871,893
- Issue date Jan 18, 2011
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Highly manufacturable SRAM cells in substrates with hybrid crystal...
- Patent number 7,605,447
- Issue date Oct 20, 2009
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with self-aligned device contacts
- Patent number 7,470,615
- Issue date Dec 30, 2008
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of patterning a magnetic stack of a magnetic memory cell an...
- Patent number 7,374,952
- Issue date May 20, 2008
- Infineon Technologies AG
- Ihar Kasko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Magnetic switching device
- Patent number 7,097,777
- Issue date Aug 29, 2006
- Infineon Technologies AG
- Gregory Costrini
- G11 - INFORMATION STORAGE
Information Patent Grant
Mask schemes for patterning magnetic tunnel junctions
- Patent number 7,001,783
- Issue date Feb 21, 2006
- Infineon Technologies AG
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer integration scheme in MRAM technology
- Patent number 6,985,384
- Issue date Jan 10, 2006
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned mask to reduce cell layout area
- Patent number 6,974,770
- Issue date Dec 13, 2005
- Infineon Technologies AG
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improved alignment of magnetic tunnel junction elements
- Patent number 6,933,204
- Issue date Aug 23, 2005
- International Business Machines Corporation
- Chandrasekhar Sarma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recessed metal lines for protective enclosure in integrated circuits
- Patent number 6,812,141
- Issue date Nov 2, 2004
- Infineon Technologies AG
- Michael C. Gaidis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Maskless array protection process flow for forming interconnect via...
- Patent number 6,784,091
- Issue date Aug 31, 2004
- International Business Machines Corporation
- Joachim Nuetzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact plug formation for devices with stacked capacitors
- Patent number 6,753,252
- Issue date Jun 22, 2004
- Infineon Technologies AG
- Youngjin Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bilayer CMP process to improve surface roughness of magnetic stack...
- Patent number 6,743,642
- Issue date Jun 1, 2004
- International Business Machines Corporation
- Gregory Costrini
- G11 - INFORMATION STORAGE
Information Patent Grant
Nitrogen-based highly polymerizing plasma process for etching of or...
- Patent number 6,686,296
- Issue date Feb 3, 2004
- International Business Machines Corp.
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Insulating cap layer and conductive cap layer for semiconductor dev...
- Patent number 6,680,500
- Issue date Jan 20, 2004
- Infineon Technologies AG
- Kia-Seng Low
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of patterning a multi-layer film stack and forming a lower...
- Patent number 6,670,233
- Issue date Dec 30, 2003
- International Business Machines Corporation
- Satish D. Athavale
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recess Pt structure for high k stacked capacitor in DRAM and FRAM,...
- Patent number 6,596,580
- Issue date Jul 22, 2003
- Infineon Technologies AG
- Jingyu Lian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of patterning a multi-layer film stack and forming a lower...
- Patent number 6,559,001
- Issue date May 6, 2003
- International Business Machines Corporation
- Satish D. Athavale
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method/structure for creating aluminum wirebound pad on copper BEOL
- Patent number 6,333,559
- Issue date Dec 25, 2001
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ISOLATION MODULE FOR BACKSIDE POWER DELIVERY
- Publication number 20250040170
- Publication date Jan 30, 2025
- Applied Materials, Inc.
- Veeraraghavan S. BASKER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF REDUCING BACKSIDE CONTACT RESISTANCE
- Publication number 20240332388
- Publication date Oct 3, 2024
- Applied Materials, Inc.
- Byeong Chan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-LEVEL ISOLATION STRUCTURE
- Publication number 20210313321
- Publication date Oct 7, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Haiting Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD TO PREVENT EPI SHORT BETWEEN TRENCHES IN FINFE...
- Publication number 20170365606
- Publication date Dec 21, 2017
- International Business Machines Corporation
- Michael V. Aquilino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD TO PREVENT EPI SHORT BETWEEN TRENCHES IN FINFE...
- Publication number 20170005098
- Publication date Jan 5, 2017
- International Business Machines Corporation
- Michael V. Aquilino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROTECTION OF SEMICONDUCTOR-OXIDE-CONTAINING GATE DIELECTRIC DURING...
- Publication number 20160351687
- Publication date Dec 1, 2016
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROTECTION OF SEMICONDUCTOR-OXIDE-CONTAINING GATE DIELECTRIC DURING...
- Publication number 20160005735
- Publication date Jan 7, 2016
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND...
- Publication number 20110092056
- Publication date Apr 21, 2011
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR NON-SELECTIVE SHALLOW TRENCH ISOLATION REACTIVE ION ETCH...
- Publication number 20090189242
- Publication date Jul 30, 2009
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for Fabricating Contacts to Pillar Structures in Integrated...
- Publication number 20090091037
- Publication date Apr 9, 2009
- Solomon Assefa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL STRESS LINER STRUCTURE HAVING SUBSTANTIALLY PLANAR INTERFACE B...
- Publication number 20090090974
- Publication date Apr 9, 2009
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STURCTURE FOR SELF-ALIGNED DEVICE CONTACTS
- Publication number 20080308936
- Publication date Dec 18, 2008
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING
- Publication number 20080272398
- Publication date Nov 6, 2008
- International Business Machines Corporation
- Gary Bela Bronner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Structure for Self-Aligned Device Contacts
- Publication number 20080233743
- Publication date Sep 25, 2008
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND...
- Publication number 20080166857
- Publication date Jul 10, 2008
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE FOR SELF-ALIGNED DEVICE CONTACTS
- Publication number 20080026513
- Publication date Jan 31, 2008
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING
- Publication number 20070249133
- Publication date Oct 25, 2007
- International Business Machines Corporation
- Gary Bela Bronner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGHLY MANUFACTURABLE SRAM CELLS IN SUBSTRATES WITH HYBRID CRYSTAL...
- Publication number 20070063278
- Publication date Mar 22, 2007
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of patterning a magnetic stack of a magnetic memory cell an...
- Publication number 20050280040
- Publication date Dec 22, 2005
- Ihar Kasko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MASK SCHEMES FOR PATTERNING MAGNETIC TUNNEL JUNCTIONS
- Publication number 20050277207
- Publication date Dec 15, 2005
- Gregory Costrini
- B82 - NANO-TECHNOLOGY
Information Patent Application
Magnetic switching device
- Publication number 20050207064
- Publication date Sep 22, 2005
- Gregory Costrini
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR IMPROVED ALIGNMENT OF MAGNETIC TUNNEL JUNCTION ELEMENTS
- Publication number 20050079683
- Publication date Apr 14, 2005
- International Business Machines Corporation
- Chandrasekhar Sarma
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Self-aligned mask to reduce cell layout area
- Publication number 20040259358
- Publication date Dec 23, 2004
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BILAYER CMP PROCESS TO IMPROVE SURFACE ROUGHNESS OF MAGNETIC STACK...
- Publication number 20040087038
- Publication date May 6, 2004
- International Business Machines Corporation
- Gregory Costrini
- G11 - INFORMATION STORAGE
Information Patent Application
Patterning metal stack layers of magnetic switching device, utilizi...
- Publication number 20040084400
- Publication date May 6, 2004
- Gregory Costrini
- G11 - INFORMATION STORAGE
Information Patent Application
Spacer integration scheme in MRAM technology
- Publication number 20040063223
- Publication date Apr 1, 2004
- International Business Machines Corporation
- Gregory Costrini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INSULATING CAP LAYER AND CONDUCTIVE CAP LAYER FOR SEMICONDUCTOR DEV...
- Publication number 20040021188
- Publication date Feb 5, 2004
- Infineon Technologies North America Corp.
- Kia-Seng Low
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of patterning a multi-layer film stack and forming a lower...
- Publication number 20030143803
- Publication date Jul 31, 2003
- International Business Machines Corporation
- Satish D. Athavale
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recess Pt structure for high k stacked capacitor in DRAM and FRAM,...
- Publication number 20030077858
- Publication date Apr 24, 2003
- Jingyu Lian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of patterning a multi-layer film stack and forming a lower...
- Publication number 20020192900
- Publication date Dec 19, 2002
- International Business Machines Corporation
- Satish D. Athavale
- H01 - BASIC ELECTRIC ELEMENTS

Gregory Costrini

Person

Patents Grantslast 30 patents

Multi-level isolation structure

Structure and method to prevent EPI short between trenches in FinFE...

Structure and method to prevent EPI short between trenches in FINFE...

Protection of semiconductor-oxide-containing gate dielectric during...

Protection of semiconductor-oxide-containing gate dielectric during...

Electrically conductive path forming below barrier oxide layer and...

Conductive spacers for semiconductor devices and methods of forming

Methods for fabricating contacts to pillar structures in integrated...

Electrically conductive path forming below barrier oxide layer and...

Method and structure for self-aligned device contacts

Method and structure for self-aligned device contacts

Method for non-selective shallow trench isolation reactive ion etch...

Highly manufacturable SRAM cells in substrates with hybrid crystal...

Semiconductor structure with self-aligned device contacts

Methods of patterning a magnetic stack of a magnetic memory cell an...

Magnetic switching device

Mask schemes for patterning magnetic tunnel junctions

Spacer integration scheme in MRAM technology

Self-aligned mask to reduce cell layout area

Method for improved alignment of magnetic tunnel junction elements

Recessed metal lines for protective enclosure in integrated circuits

Maskless array protection process flow for forming interconnect via...

Contact plug formation for devices with stacked capacitors

Bilayer CMP process to improve surface roughness of magnetic stack...

Nitrogen-based highly polymerizing plasma process for etching of or...

Insulating cap layer and conductive cap layer for semiconductor dev...

Methods of patterning a multi-layer film stack and forming a lower...

Recess Pt structure for high k stacked capacitor in DRAM and FRAM,...

Methods of patterning a multi-layer film stack and forming a lower...

Method/structure for creating aluminum wirebound pad on copper BEOL

Patents Applicationslast 30 patents

ISOLATION MODULE FOR BACKSIDE POWER DELIVERY

METHODS OF REDUCING BACKSIDE CONTACT RESISTANCE

MULTI-LEVEL ISOLATION STRUCTURE

STRUCTURE AND METHOD TO PREVENT EPI SHORT BETWEEN TRENCHES IN FINFE...

STRUCTURE AND METHOD TO PREVENT EPI SHORT BETWEEN TRENCHES IN FINFE...

PROTECTION OF SEMICONDUCTOR-OXIDE-CONTAINING GATE DIELECTRIC DURING...

PROTECTION OF SEMICONDUCTOR-OXIDE-CONTAINING GATE DIELECTRIC DURING...

ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND...

METHOD FOR NON-SELECTIVE SHALLOW TRENCH ISOLATION REACTIVE ION ETCH...

Methods for Fabricating Contacts to Pillar Structures in Integrated...

DUAL STRESS LINER STRUCTURE HAVING SUBSTANTIALLY PLANAR INTERFACE B...

METHOD AND STURCTURE FOR SELF-ALIGNED DEVICE CONTACTS

CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING

Method and Structure for Self-Aligned Device Contacts

ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND...

METHOD AND STRUCTURE FOR SELF-ALIGNED DEVICE CONTACTS

CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING

HIGHLY MANUFACTURABLE SRAM CELLS IN SUBSTRATES WITH HYBRID CRYSTAL...

Methods of patterning a magnetic stack of a magnetic memory cell an...

MASK SCHEMES FOR PATTERNING MAGNETIC TUNNEL JUNCTIONS

Magnetic switching device

METHOD FOR IMPROVED ALIGNMENT OF MAGNETIC TUNNEL JUNCTION ELEMENTS

Self-aligned mask to reduce cell layout area

BILAYER CMP PROCESS TO IMPROVE SURFACE ROUGHNESS OF MAGNETIC STACK...

Patterning metal stack layers of magnetic switching device, utilizi...

Spacer integration scheme in MRAM technology

INSULATING CAP LAYER AND CONDUCTIVE CAP LAYER FOR SEMICONDUCTOR DEV...

Methods of patterning a multi-layer film stack and forming a lower...

Recess Pt structure for high k stacked capacitor in DRAM and FRAM,...

Methods of patterning a multi-layer film stack and forming a lower...