Gulsun Yasar

Person

S. Burlington, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for enhancing a power bus in I/O regions of an ASIC device
- Patent number 6,598,216
- Issue date Jul 22, 2003
- International Business Machines Corporation
- Francis Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast method of I/O circuit placement and electrical rule checking
- Patent number 6,584,606
- Issue date Jun 24, 2003
- International Business Machines Corporation
- Charles S. Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of assigning integrated circuit I/O signals in an integrated...
- Patent number 6,499,134
- Issue date Dec 24, 2002
- International Business Machines Corporation
- Patrick H. Buffet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field programmable gate arrays using semi-hard multicell macros
- Patent number 5,761,078
- Issue date Jun 2, 1998
- International Business Machines Corporation
- Christine Marie Fuller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable built-in self test method and controller for arrays
- Patent number 5,633,877
- Issue date May 27, 1997
- International Business Machines Corporation
- Philip G. Shephard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for memory dynamic burn-in and test
- Patent number 5,375,091
- Issue date Dec 20, 1994
- International Business Machines Corporation
- Robert W. Berry
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Method for enhancing a power bus in I/O regions of an ASIC device
- Publication number 20030033578
- Publication date Feb 13, 2003
- International Business Machines Corporation
- Francis Chan
- G06 - COMPUTING CALCULATING COUNTING

Gulsun Yasar

Person

Patents Grantslast 30 patents

Method for enhancing a power bus in I/O regions of an ASIC device

Fast method of I/O circuit placement and electrical rule checking

Method of assigning integrated circuit I/O signals in an integrated...

Field programmable gate arrays using semi-hard multicell macros

Programmable built-in self test method and controller for arrays

Method and apparatus for memory dynamic burn-in and test

Patents Applicationslast 30 patents

Method for enhancing a power bus in I/O regions of an ASIC device